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author | Tim Shen <timshen91@gmail.com> | 2017-05-03 00:07:02 +0000 |
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committer | Tim Shen <timshen91@gmail.com> | 2017-05-03 00:07:02 +0000 |
commit | e59d06fe78fd3ec58a247b7af42b59013a61ac5e (patch) | |
tree | 0510b70595d4589b9a1ecce353c1b3561b707b46 /llvm/lib/Target/PowerPC | |
parent | 0255227a58b80b6664df331f207919c10ef6e0bf (diff) | |
download | bcm5719-llvm-e59d06fe78fd3ec58a247b7af42b59013a61ac5e.tar.gz bcm5719-llvm-e59d06fe78fd3ec58a247b7af42b59013a61ac5e.zip |
[PowerPC, DAGCombiner] Fold a << (b % (sizeof(a) * 8)) back to a single instruction
Summary:
This is the corresponding llvm change to D28037 to ensure no performance
regression.
Reviewers: bogner, kbarton, hfinkel, iteratee, echristo
Subscribers: nemanjai, llvm-commits
Differential Revision: https://reviews.llvm.org/D28329
llvm-svn: 301990
Diffstat (limited to 'llvm/lib/Target/PowerPC')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h index 5645fdc2485..32661099b79 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.h +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h @@ -1017,6 +1017,14 @@ namespace llvm { SDValue combineElementTruncationToVectorTruncation(SDNode *N, DAGCombinerInfo &DCI) const; + + bool supportsModuloShift(ISD::NodeType Inst, + EVT ReturnType) const override { + assert((Inst == ISD::SHL || Inst == ISD::SRA || Inst == ISD::SRL) && + "Expect a shift instruction"); + assert(isOperationLegal(Inst, ReturnType)); + return ReturnType.isVector(); + } }; namespace PPC { |