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| author | Jinsong Ji <jji@us.ibm.com> | 2020-01-03 20:25:19 +0000 |
|---|---|---|
| committer | Jinsong Ji <jji@us.ibm.com> | 2020-01-06 18:44:59 +0000 |
| commit | e29a2e6be4e114b4233a2e0feedb74b2f34cf782 (patch) | |
| tree | f8fd479d04b670935e2420fa700db92ccb81857a /llvm/lib/Target/PowerPC | |
| parent | 7ae3d335467a24faa80ebd9b31446c649570ca0c (diff) | |
| download | bcm5719-llvm-e29a2e6be4e114b4233a2e0feedb74b2f34cf782.tar.gz bcm5719-llvm-e29a2e6be4e114b4233a2e0feedb74b2f34cf782.zip | |
[PowerPC][LoopVectorize] Extend getRegisterClassForType to consider double and other floating point type
In https://reviews.llvm.org/D67148, we use isFloatTy to test floating
point type, otherwise we return GPRRC.
So 'double' will be classified as GPRRC, which is not accurate.
This patch covers other floating point types.
Reviewed By: #powerpc, nemanjai
Differential Revision: https://reviews.llvm.org/D71946
Diffstat (limited to 'llvm/lib/Target/PowerPC')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp index 9d78759876a..e05699cc95e 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp @@ -584,8 +584,8 @@ unsigned PPCTTIImpl::getNumberOfRegisters(unsigned ClassID) const { assert(ClassID == GPRRC || ClassID == FPRRC || ClassID == VRRC || ClassID == VSXRC); if (ST->hasVSX()) { - assert(ClassID == GPRRC || ClassID == VSXRC); - return ClassID == GPRRC ? 32 : 64; + assert(ClassID == GPRRC || ClassID == VSXRC || ClassID == VRRC); + return ClassID == VSXRC ? 64 : 32; } assert(ClassID == GPRRC || ClassID == FPRRC || ClassID == VRRC); return 32; @@ -594,8 +594,14 @@ unsigned PPCTTIImpl::getNumberOfRegisters(unsigned ClassID) const { unsigned PPCTTIImpl::getRegisterClassForType(bool Vector, Type *Ty) const { if (Vector) return ST->hasVSX() ? VSXRC : VRRC; - else if (Ty && Ty->getScalarType()->isFloatTy()) + else if (Ty && (Ty->getScalarType()->isFloatTy() || + Ty->getScalarType()->isDoubleTy())) return ST->hasVSX() ? VSXRC : FPRRC; + else if (Ty && (Ty->getScalarType()->isFP128Ty() || + Ty->getScalarType()->isPPC_FP128Ty())) + return VRRC; + else if (Ty && Ty->getScalarType()->isHalfTy()) + return VSXRC; else return GPRRC; } |

