diff options
author | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-05-26 10:47:10 +0000 |
---|---|---|
committer | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-05-26 10:47:10 +0000 |
commit | db0712f986521e586aaff87da3db56f0ce33f20f (patch) | |
tree | b4e9c54fc70bf89956ea142ffcdd2f5938428bd1 /llvm/lib/Target/PowerPC | |
parent | 02fc0b1d645436dbe3dd8256ae232939af3e9ada (diff) | |
download | bcm5719-llvm-db0712f986521e586aaff87da3db56f0ce33f20f.tar.gz bcm5719-llvm-db0712f986521e586aaff87da3db56f0ce33f20f.zip |
Use std::bitset for SubtargetFeatures.
Previously, subtarget features were a bitfield with the underlying type being uint64_t.
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.
The first several times this was committed (e.g. r229831, r233055), it caused several buildbot failures.
Apparently the reason for most failures was both clang and gcc's inability to deal with large numbers (> 10K) of bitset constructor calls in tablegen-generated initializers of instruction info tables.
This should now be fixed.
llvm-svn: 238192
Diffstat (limited to 'llvm/lib/Target/PowerPC')
-rw-r--r-- | llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp index 15225049f56..f8997fd90d9 100644 --- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -1682,7 +1682,7 @@ bool PPCAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name, // where th can be omitted when it is 0. dcbtst is the same. We take the // server form to be the default, so swap the operands if we're parsing for // an embedded core (they'll be swapped again upon printing). - if ((STI.getFeatureBits() & PPC::FeatureBookE) != 0 && + if (STI.getFeatureBits()[PPC::FeatureBookE] && Operands.size() == 4 && (Name == "dcbt" || Name == "dcbtst")) { std::swap(Operands[1], Operands[3]); diff --git a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp index e2320a11aba..4799ea27c4b 100644 --- a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp +++ b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp @@ -387,7 +387,7 @@ DecodeStatus PPCDisassembler::getInstruction(MCInst &MI, uint64_t &Size, uint32_t Inst = (Bytes[0] << 24) | (Bytes[1] << 16) | (Bytes[2] << 8) | (Bytes[3] << 0); - if ((STI.getFeatureBits() & PPC::FeatureQPX) != 0) { + if (STI.getFeatureBits()[PPC::FeatureQPX]) { DecodeStatus result = decodeInstruction(DecoderTableQPX32, MI, Inst, Address, this, STI); if (result != MCDisassembler::Fail) diff --git a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp index 53223ed50fa..1a130e87bf3 100644 --- a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp +++ b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp @@ -121,7 +121,7 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O, O << "t"; O << " "; - bool IsBookE = (STI.getFeatureBits() & PPC::FeatureBookE) != 0; + bool IsBookE = STI.getFeatureBits()[PPC::FeatureBookE]; if (IsBookE && TH != 0 && TH != 16) O << (unsigned int) TH << ", "; |