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author | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-05-13 10:28:46 +0000 |
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committer | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-05-13 10:28:46 +0000 |
commit | c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23 (patch) | |
tree | 94dc79d894cf6e87f33787cba82f5a731a3a96be /llvm/lib/Target/PowerPC | |
parent | a7b142603da5ae63232b727bb20b997cadbaf4bb (diff) | |
download | bcm5719-llvm-c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23.tar.gz bcm5719-llvm-c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23.zip |
Reverting r237234, "Use std::bitset for SubtargetFeatures"
The buildbots are still not satisfied.
MIPS and ARM are failing (even though at least MIPS was expected to pass).
llvm-svn: 237245
Diffstat (limited to 'llvm/lib/Target/PowerPC')
-rw-r--r-- | llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp index 0cdef5ac6de..8280f74c063 100644 --- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -1680,7 +1680,7 @@ bool PPCAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name, // where th can be omitted when it is 0. dcbtst is the same. We take the // server form to be the default, so swap the operands if we're parsing for // an embedded core (they'll be swapped again upon printing). - if (STI.getFeatureBits()[PPC::FeatureBookE] && + if ((STI.getFeatureBits() & PPC::FeatureBookE) != 0 && Operands.size() == 4 && (Name == "dcbt" || Name == "dcbtst")) { std::swap(Operands[1], Operands[3]); diff --git a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp index 5b6e6b25b99..9a5c829aa90 100644 --- a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp +++ b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp @@ -387,7 +387,7 @@ DecodeStatus PPCDisassembler::getInstruction(MCInst &MI, uint64_t &Size, uint32_t Inst = (Bytes[0] << 24) | (Bytes[1] << 16) | (Bytes[2] << 8) | (Bytes[3] << 0); - if (STI.getFeatureBits()[PPC::FeatureQPX]) { + if ((STI.getFeatureBits() & PPC::FeatureQPX) != 0) { DecodeStatus result = decodeInstruction(DecoderTableQPX32, MI, Inst, Address, this, STI); if (result != MCDisassembler::Fail) diff --git a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp index df88aa4f5da..c87499ffeae 100644 --- a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp +++ b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp @@ -119,7 +119,7 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O, O << "t"; O << " "; - bool IsBookE = STI.getFeatureBits()[PPC::FeatureBookE]; + bool IsBookE = (STI.getFeatureBits() & PPC::FeatureBookE) != 0; if (IsBookE && TH != 0 && TH != 16) O << (unsigned int) TH << ", "; |