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| author | Roman Divacky <rdivacky@freebsd.org> | 2012-04-02 15:49:30 +0000 |
|---|---|---|
| committer | Roman Divacky <rdivacky@freebsd.org> | 2012-04-02 15:49:30 +0000 |
| commit | b9663ccd6b844ac35c64278eda781598034c79e3 (patch) | |
| tree | e07efef3d04ad694fd637943b39519f9314fd56c /llvm/lib/Target/PowerPC | |
| parent | 98144e9e1aeba0d56a1b4309e2b285648f0bd5a1 (diff) | |
| download | bcm5719-llvm-b9663ccd6b844ac35c64278eda781598034c79e3.tar.gz bcm5719-llvm-b9663ccd6b844ac35c64278eda781598034c79e3.zip | |
Implement the SVR4 byval alignment for aggregates. Fixing a FIXME.
llvm-svn: 153876
Diffstat (limited to 'llvm/lib/Target/PowerPC')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 96b7074aa02..746fc23c211 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -446,7 +446,16 @@ unsigned PPCTargetLowering::getByValTypeAlignment(Type *Ty) const { // Darwin passes everything on 4 byte boundary. if (TM.getSubtarget<PPCSubtarget>().isDarwin()) return 4; - // FIXME SVR4 TBD + + // 16byte and wider vectors are passed on 16byte boundary. + if (VectorType *VTy = dyn_cast<VectorType>(Ty)) + if (VTy->getBitWidth() >= 128) + return 16; + + // The rest is 8 on PPC64 and 4 on PPC32 boundary. + if (PPCSubTarget.isPPC64()) + return 8; + return 4; } |
