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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-04-05 03:10:20 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-04-05 03:10:20 +0000 |
| commit | b93331f3be8f009b17c3114d5991476157264688 (patch) | |
| tree | ad959ff89fbfde60b3fcaa19019fa95b28016ca5 /llvm/lib/Target/PowerPC | |
| parent | ab5dc34351c8f64ed8f59d8deadf8472830d5771 (diff) | |
| download | bcm5719-llvm-b93331f3be8f009b17c3114d5991476157264688.tar.gz bcm5719-llvm-b93331f3be8f009b17c3114d5991476157264688.zip | |
Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.
This works well because TableGen resolves member references late:
class I : Instruction {
AddrMode AM = AddrModeNone;
let TSFlags{3-0} = AM.Value;
}
let AM = AddrMode4 in
def ADD : I;
TSFlags gets the expected bits from AddrMode4 in this example.
llvm-svn: 100384
Diffstat (limited to 'llvm/lib/Target/PowerPC')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPC.td | 8 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrFormats.td | 11 |
2 files changed, 8 insertions, 11 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td index 08f5bb43087..27644b2daca 100644 --- a/llvm/lib/Target/PowerPC/PPC.td +++ b/llvm/lib/Target/PowerPC/PPC.td @@ -96,14 +96,6 @@ def : Processor<"ppc64", G5Itineraries, include "PPCCallingConv.td" def PPCInstrInfo : InstrInfo { - // Define how we want to layout our TargetSpecific information field... This - // should be kept up-to-date with the fields in the PPCInstrInfo.h file. - let TSFlagsFields = ["PPC970_First", - "PPC970_Single", - "PPC970_Cracked", - "PPC970_Unit"]; - let TSFlagsShifts = [0, 1, 2, 3]; - let isLittleEndianEncoding = 1; } diff --git a/llvm/lib/Target/PowerPC/PPCInstrFormats.td b/llvm/lib/Target/PowerPC/PPCInstrFormats.td index 54cebcdecd6..4357bdccec7 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrFormats.td +++ b/llvm/lib/Target/PowerPC/PPCInstrFormats.td @@ -23,13 +23,18 @@ class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin> let InOperandList = IOL; let AsmString = asmstr; let Itinerary = itin; - - /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to - /// these must be reflected there! See comments there for what these are. + bits<1> PPC970_First = 0; bits<1> PPC970_Single = 0; bits<1> PPC970_Cracked = 0; bits<3> PPC970_Unit = 0; + + /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to + /// these must be reflected there! See comments there for what these are. + let TSFlags{0} = PPC970_First; + let TSFlags{1} = PPC970_Single; + let TSFlags{2} = PPC970_Cracked; + let TSFlags{5-3} = PPC970_Unit; } class PPC970_DGroup_First { bits<1> PPC970_First = 1; } |

