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| author | Zaara Syeda <syzaara@ca.ibm.com> | 2018-05-28 15:27:58 +0000 |
|---|---|---|
| committer | Zaara Syeda <syzaara@ca.ibm.com> | 2018-05-28 15:27:58 +0000 |
| commit | 6f3df02fdc7faf125208f2c03a99ba3b4e9f8b1d (patch) | |
| tree | 53aca7ce4daebabdf7cf2d311a9377d4eeb88f57 /llvm/lib/Target/PowerPC | |
| parent | 11f55c37ddcc5f47cdf067ce9dde66f62da700f8 (diff) | |
| download | bcm5719-llvm-6f3df02fdc7faf125208f2c03a99ba3b4e9f8b1d.tar.gz bcm5719-llvm-6f3df02fdc7faf125208f2c03a99ba3b4e9f8b1d.zip | |
[PowerPC] Set isAsmParserOnly=1 for X-form TLS loads/stores
The X-form TLS load/store instructions added for optimizing the initial-exec
sequence in https://reviews.llvm.org/rL327635 fail to assemble. llvm-mc fails
with the error: invalid operand for instruction. This patch adds these
instructions into a block with isAsmParserOnly, similar to how ADD8TLS_ is
currently handled.
Differential Revision: https://reviews.llvm.org/D47382
llvm-svn: 333374
Diffstat (limited to 'llvm/lib/Target/PowerPC')
| -rw-r--r-- | llvm/lib/Target/PowerPC/P9InstrResources.td | 10 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 29 |
2 files changed, 33 insertions, 6 deletions
diff --git a/llvm/lib/Target/PowerPC/P9InstrResources.td b/llvm/lib/Target/PowerPC/P9InstrResources.td index c4a3a631938..7b04875e3e3 100644 --- a/llvm/lib/Target/PowerPC/P9InstrResources.td +++ b/llvm/lib/Target/PowerPC/P9InstrResources.td @@ -736,13 +736,13 @@ def : InstRW<[P9_LS_4C, IP_AGEN_1C, DISP_1C, DISP_1C], (instregex "ICBI(EP)?$"), (instregex "ICBT(LS)?$"), (instregex "LBARX(L)?$"), - (instregex "LBZ(CIX|8|X|X8|XTLS|XTLS_32)?$"), - (instregex "LD(ARX|ARXL|BRX|CIX|X|XTLS)?$"), + (instregex "LBZ(CIX|8|X|X8|XTLS|XTLS_32)?(_)?$"), + (instregex "LD(ARX|ARXL|BRX|CIX|X|XTLS)?(_)?$"), (instregex "LH(A|B)RX(L)?(8)?$"), - (instregex "LHZ(8|CIX|X|X8|XTLS|XTLS_32)?$"), + (instregex "LHZ(8|CIX|X|X8|XTLS|XTLS_32)?(_)?$"), (instregex "LWARX(L)?$"), (instregex "LWBRX(8)?$"), - (instregex "LWZ(8|CIX|X|X8|XTLS|XTLS_32)?$"), + (instregex "LWZ(8|CIX|X|X8|XTLS|XTLS_32)?(_)?$"), CP_ABORT, DARN, EnforceIEIO, @@ -894,7 +894,7 @@ def : InstRW<[P9_LS_1C, IP_EXEC_1C, IP_AGEN_1C, DISP_1C, DISP_1C, DISP_1C], (instregex "(D|X)FSTORE(f32|f64)$"), (instregex "ST(W|H|D)BRX$"), (instregex "ST(B|H|D)(8)?$"), - (instregex "ST(B|W|H|D)(CI)?X(TLS|TLS_32)?(8)?$"), + (instregex "ST(B|W|H|D)(CI)?X(TLS|TLS_32)?(8)?(_)?$"), STIWX, SLBIEG, STMW, diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td index aa218ae3a07..cdd57c6a111 100644 --- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td @@ -600,10 +600,37 @@ defm SUBFZE8 : XOForm_3rc<31, 200, 0, (outs g8rc:$rT), (ins g8rc:$rA), // FIXME: Duplicating this for the asm parser should be unnecessary, but the // previous definition must be marked as CodeGen only to prevent decoding // conflicts. -let isAsmParserOnly = 1 in +let isAsmParserOnly = 1 in { def ADD8TLS_ : XOForm_1<31, 266, 0, (outs g8rc:$rT), (ins g8rc:$rA, tlsreg:$rB), "add $rT, $rA, $rB", IIC_IntSimple, []>; +let mayLoad = 1 in { +def LBZXTLS_ : XForm_1<31, 87, (outs g8rc:$rD), (ins ptr_rc_nor0:$rA, tlsreg:$rB), + "lbzx $rD, $rA, $rB", IIC_LdStLoad, []>; +def LHZXTLS_ : XForm_1<31, 279, (outs g8rc:$rD), (ins ptr_rc_nor0:$rA, tlsreg:$rB), + "lhzx $rD, $rA, $rB", IIC_LdStLoad, []>; +def LWZXTLS_ : XForm_1<31, 23, (outs g8rc:$rD), (ins ptr_rc_nor0:$rA, tlsreg:$rB), + "lwzx $rD, $rA, $rB", IIC_LdStLoad, []>; +def LDXTLS_ : XForm_1<31, 21, (outs g8rc:$rD), (ins ptr_rc_nor0:$rA, tlsreg:$rB), + "ldx $rD, $rA, $rB", IIC_LdStLD, []>, isPPC64; +} + +let mayStore = 1 in { +def STBXTLS_ : XForm_8<31, 215, (outs), (ins g8rc:$rS, ptr_rc_nor0:$rA, tlsreg:$rB), + "stbx $rS, $rA, $rB", IIC_LdStStore, []>, + PPC970_DGroup_Cracked; +def STHXTLS_ : XForm_8<31, 407, (outs), (ins g8rc:$rS, ptr_rc_nor0:$rA, tlsreg:$rB), + "sthx $rS, $rA, $rB", IIC_LdStStore, []>, + PPC970_DGroup_Cracked; +def STWXTLS_ : XForm_8<31, 151, (outs), (ins g8rc:$rS, ptr_rc_nor0:$rA, tlsreg:$rB), + "stwx $rS, $rA, $rB", IIC_LdStStore, []>, + PPC970_DGroup_Cracked; +def STDXTLS_ : XForm_8<31, 149, (outs), (ins g8rc:$rS, ptr_rc_nor0:$rA, tlsreg:$rB), + "stdx $rS, $rA, $rB", IIC_LdStSTD, []>, isPPC64, + PPC970_DGroup_Cracked; +} +} + let isCommutable = 1 in { defm MULHD : XOForm_1r<31, 73, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), "mulhd", "$rT, $rA, $rB", IIC_IntMulHW, |
