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| author | Adam Nemet <anemet@apple.com> | 2014-05-20 17:20:34 +0000 |
|---|---|---|
| committer | Adam Nemet <anemet@apple.com> | 2014-05-20 17:20:34 +0000 |
| commit | 571eb5fc91954d8c2b71782d4a86f2cb63bfd05b (patch) | |
| tree | dece3f698974116f00fa0a65de434a10d2e96e5f /llvm/lib/Target/PowerPC | |
| parent | 4c08be18b12f256d46d36f0cc0e49c0f2da42cff (diff) | |
| download | bcm5719-llvm-571eb5fc91954d8c2b71782d4a86f2cb63bfd05b.tar.gz bcm5719-llvm-571eb5fc91954d8c2b71782d4a86f2cb63bfd05b.zip | |
[PowerPC] PR19796: Also match ISD::TargetConstant in isIntS16Immediate
The SplitIndexingFromLoad changes exposed a latent isel bug in the PowerPC64
backend. We matched an immediate offset with STWX8 even though it only
supports register offset.
The culprit is the complex-pattern predicate, SelectAddrIdx, which decides
that if the offset is not ISD::Constant it must be a register.
Many thanks to Bill Schmidt for testing this.
llvm-svn: 209219
Diffstat (limited to 'llvm/lib/Target/PowerPC')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 04bd43547c7..214c8692060 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -1137,7 +1137,7 @@ SDValue PPC::get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) { /// sign extension from a 16-bit value. If so, this returns true and the /// immediate. static bool isIntS16Immediate(SDNode *N, short &Imm) { - if (N->getOpcode() != ISD::Constant) + if (!isa<ConstantSDNode>(N)) return false; Imm = (short)cast<ConstantSDNode>(N)->getZExtValue(); |
