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| author | Stefan Pintilie <stefanp@ca.ibm.com> | 2018-11-21 20:47:59 +0000 |
|---|---|---|
| committer | Stefan Pintilie <stefanp@ca.ibm.com> | 2018-11-21 20:47:59 +0000 |
| commit | 46e3cd76e2afbb14862d552a0331e746742e3f87 (patch) | |
| tree | 502dd7b3fb73cb679217bbf0aff17cd0be274794 /llvm/lib/Target/PowerPC | |
| parent | 94d4c9e0941409d6a0ca2688e512d19faa716599 (diff) | |
| download | bcm5719-llvm-46e3cd76e2afbb14862d552a0331e746742e3f87.tar.gz bcm5719-llvm-46e3cd76e2afbb14862d552a0331e746742e3f87.zip | |
[PowerPC][NFC] Minor Code Cleaup for PPCMCCodeEmitter.
llvm-svn: 347422
Diffstat (limited to 'llvm/lib/Target/PowerPC')
| -rw-r--r-- | llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 71 |
1 files changed, 41 insertions, 30 deletions
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp index 7c0f5f0eb30..929bb4f20f2 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp @@ -111,36 +111,10 @@ public: void encodeInstruction(const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups, - const MCSubtargetInfo &STI) const override { - verifyInstructionPredicates(MI, - computeAvailableFeatures(STI.getFeatureBits())); - - unsigned Opcode = MI.getOpcode(); - const MCInstrDesc &Desc = MCII.get(Opcode); - - uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI); - - // Output the constant in big/little endian byte order. - unsigned Size = Desc.getSize(); - support::endianness E = IsLittleEndian ? support::little : support::big; - switch (Size) { - case 0: - break; - case 4: - support::endian::write<uint32_t>(OS, Bits, E); - break; - case 8: - // If we emit a pair of instructions, the first one is - // always in the top 32 bits, even on little-endian. - support::endian::write<uint32_t>(OS, Bits >> 32, E); - support::endian::write<uint32_t>(OS, Bits, E); - break; - default: - llvm_unreachable("Invalid instruction size"); - } - - ++MCNumEmitted; // Keep track of the # of mi's emitted. - } + const MCSubtargetInfo &STI) const override; + + // Get the number of bytes used to encode the given MCInst. + unsigned getInstSizeInBytes(const MCInst &MI) const; private: uint64_t computeAvailableFeatures(const FeatureBitset &FB) const; @@ -396,5 +370,42 @@ getMachineOpValue(const MCInst &MI, const MCOperand &MO, return MO.getImm(); } +void PPCMCCodeEmitter::encodeInstruction( + const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups, + const MCSubtargetInfo &STI) const { + verifyInstructionPredicates(MI, + computeAvailableFeatures(STI.getFeatureBits())); + + uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI); + + // Output the constant in big/little endian byte order. + unsigned Size = getInstSizeInBytes(MI); + support::endianness E = IsLittleEndian ? support::little : support::big; + switch (Size) { + case 0: + break; + case 4: + support::endian::write<uint32_t>(OS, Bits, E); + break; + case 8: + // If we emit a pair of instructions, the first one is + // always in the top 32 bits, even on little-endian. + support::endian::write<uint32_t>(OS, Bits >> 32, E); + support::endian::write<uint32_t>(OS, Bits, E); + break; + default: + llvm_unreachable("Invalid instruction size"); + } + + ++MCNumEmitted; // Keep track of the # of mi's emitted. +} + +// Get the number of bytes used to encode the given MCInst. +unsigned PPCMCCodeEmitter::getInstSizeInBytes(const MCInst &MI) const { + unsigned Opcode = MI.getOpcode(); + const MCInstrDesc &Desc = MCII.get(Opcode); + return Desc.getSize(); +} + #define ENABLE_INSTR_PREDICATE_VERIFIER #include "PPCGenMCCodeEmitter.inc" |

