summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/PowerPC
diff options
context:
space:
mode:
authorNate Begeman <natebegeman@mac.com>2006-03-28 04:15:58 +0000
committerNate Begeman <natebegeman@mac.com>2006-03-28 04:15:58 +0000
commit1b3928765d7076b16b43ff9cd55ec7f37ac3c760 (patch)
tree88531b3d2dba31f8381c64daca825bb3702ef4ee /llvm/lib/Target/PowerPC
parente496f5347e822934e58ea6aaa7294180db886137 (diff)
downloadbcm5719-llvm-1b3928765d7076b16b43ff9cd55ec7f37ac3c760.tar.gz
bcm5719-llvm-1b3928765d7076b16b43ff9cd55ec7f37ac3c760.zip
Add a few more altivec intrinsics
llvm-svn: 27215
Diffstat (limited to 'llvm/lib/Target/PowerPC')
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp4
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrAltivec.td28
-rw-r--r--llvm/lib/Target/PowerPC/README_ALTIVEC.txt2
3 files changed, 28 insertions, 6 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 46cf60e9981..0c50c59580f 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -300,8 +300,8 @@ bool PPC::isVecSplatImm(SDNode *N, unsigned ByteSize, char *Val) {
if (OpVal.Val == 0) return false; // All UNDEF: use implicit def.
- unsigned ValSizeInBytes;
- uint64_t Value;
+ unsigned ValSizeInBytes = 0;
+ uint64_t Value = 0;
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) {
Value = CN->getValue();
ValSizeInBytes = MVT::getSizeInBits(CN->getValueType(0))/8;
diff --git a/llvm/lib/Target/PowerPC/PPCInstrAltivec.td b/llvm/lib/Target/PowerPC/PPCInstrAltivec.td
index c02f78bc9cc..d6a3946b85d 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrAltivec.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrAltivec.td
@@ -121,7 +121,14 @@ def VNMSUBFP: VAForm_1<47, (ops VRRC:$vD, VRRC:$vA, VRRC:$vC, VRRC:$vB),
[(set VRRC:$vD, (fneg (fsub (fmul VRRC:$vA, VRRC:$vC),
VRRC:$vB)))]>,
Requires<[FPContractions]>;
-
+def VMHADDSHS : VAForm_1a<32, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC),
+ "vmhaddshs $vD, $vA, $vB, $vC", VecFP,
+ [(set VRRC:$vD,
+ (int_ppc_altivec_vmhaddshs VRRC:$vA, VRRC:$vB, VRRC:$vC))]>;
+def VMHRADDSHS : VAForm_1a<33, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC),
+ "vmhraddshs $vD, $vA, $vB, $vC", VecFP,
+ [(set VRRC:$vD,
+ (int_ppc_altivec_vmhraddshs VRRC:$vA, VRRC:$vB, VRRC:$vC))]>;
def VPERM : VAForm_1a<43, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC),
"vperm $vD, $vA, $vB, $vC", VecPerm,
[(set VRRC:$vD,
@@ -213,6 +220,22 @@ def VMAXFP : VXForm_1<1034, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
def VMINFP : VXForm_1<1098, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
"vminfp $vD, $vA, $vB", VecFP,
[]>;
+def VMRGHH : VXForm_1<76, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
+ "vmrghh $vD, $vA, $vB", VecFP,
+ [(set VRRC:$vD,
+ (int_ppc_altivec_vmrghh VRRC:$vA, VRRC:$vB))]>;
+def VMRGHW : VXForm_1<140, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
+ "vmrghh $vD, $vA, $vB", VecFP,
+ [(set VRRC:$vD,
+ (int_ppc_altivec_vmrghw VRRC:$vA, VRRC:$vB))]>;
+def VMRGLH : VXForm_1<332, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
+ "vmrglh $vD, $vA, $vB", VecFP,
+ [(set VRRC:$vD,
+ (int_ppc_altivec_vmrglh VRRC:$vA, VRRC:$vB))]>;
+def VMRGLW : VXForm_1<396, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
+ "vmrglh $vD, $vA, $vB", VecFP,
+ [(set VRRC:$vD,
+ (int_ppc_altivec_vmrglw VRRC:$vA, VRRC:$vB))]>;
def VREFP : VXForm_2<266, (ops VRRC:$vD, VRRC:$vB),
"vrefp $vD, $vB", VecFP,
[(set VRRC:$vD, (int_ppc_altivec_vrefp VRRC:$vB))]>;
@@ -598,7 +621,8 @@ def : Pat<(int_ppc_altivec_vmaddfp VRRC:$A, VRRC:$B, VRRC:$C),
(VMADDFP VRRC:$A, VRRC:$B, VRRC:$C)>;
def : Pat<(int_ppc_altivec_vnmsubfp VRRC:$A, VRRC:$B, VRRC:$C),
(VNMSUBFP VRRC:$A, VRRC:$B, VRRC:$C)>;
-
+def : Pat<(int_ppc_altivec_vperm VRRC:$A, VRRC:$B, VRRC:$C),
+ (VPERM VRRC:$A, VRRC:$B, VRRC:$C)>;
def : Pat<(vector_shuffle (v4i32 VRRC:$vB), (undef), VSPLT_shuffle_mask:$UIMM),
(v4i32 (VSPLTW VSPLT_shuffle_mask:$UIMM, VRRC:$vB))>;
diff --git a/llvm/lib/Target/PowerPC/README_ALTIVEC.txt b/llvm/lib/Target/PowerPC/README_ALTIVEC.txt
index 6439a2909e2..7754f4c13c8 100644
--- a/llvm/lib/Target/PowerPC/README_ALTIVEC.txt
+++ b/llvm/lib/Target/PowerPC/README_ALTIVEC.txt
@@ -54,13 +54,11 @@ lvsl/lvsr
mf*
vavg*
vmax*
-vmhaddshs/vmhraddshs
vmin*
vmladduhm
vmr*
vmsum*
vmul*
-vperm
vpk*
vsel (some aliases only accessible using builtins)
vup*
OpenPOWER on IntegriCloud