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author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-03-06 07:32:13 +0000 |
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committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-03-06 07:32:13 +0000 |
commit | 12e67d868a2940e011f0a5b413fbac28571c9979 (patch) | |
tree | c2ab537496db60fcde2305a39ed5832bb4dfad22 /llvm/lib/Target/PowerPC | |
parent | a814c94163cc12df9c7b533cec22ea7cc4c20688 (diff) | |
download | bcm5719-llvm-12e67d868a2940e011f0a5b413fbac28571c9979.tar.gz bcm5719-llvm-12e67d868a2940e011f0a5b413fbac28571c9979.zip |
[PowerPC] Fix failure with STBRX when store is narrower than the bswap
Fixes a crash caused by r296811 by truncating the input of the STBRX node
when the bswap is wider than i32.
Fixes https://bugs.llvm.org/show_bug.cgi?id=32140
Differential Revision: https://reviews.llvm.org/D30615
llvm-svn: 297001
Diffstat (limited to 'llvm/lib/Target/PowerPC')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index f532d48a701..df75ebe4a33 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -11395,9 +11395,12 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N, // it need to be shifted to the right side before STBRX. EVT mVT = cast<StoreSDNode>(N)->getMemoryVT(); if (Op1VT.bitsGT(mVT)) { - int shift = Op1VT.getSizeInBits() - mVT.getSizeInBits(); + int Shift = Op1VT.getSizeInBits() - mVT.getSizeInBits(); BSwapOp = DAG.getNode(ISD::SRL, dl, Op1VT, BSwapOp, - DAG.getConstant(shift, dl, MVT::i32)); + DAG.getConstant(Shift, dl, MVT::i32)); + // Need to truncate if this is a bswap of i64 stored as i32/i16. + if (Op1VT == MVT::i64) + BSwapOp = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, BSwapOp); } SDValue Ops[] = { |