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| author | Duncan Sands <baldrick@free.fr> | 2008-06-08 20:54:56 +0000 |
|---|---|---|
| committer | Duncan Sands <baldrick@free.fr> | 2008-06-08 20:54:56 +0000 |
| commit | 11dd42453935c5f92bf7b4501c863a9e399031ef (patch) | |
| tree | 932fcffde0f3ef41f1349d489a7b29044c3822cd /llvm/lib/Target/PowerPC | |
| parent | b4866ef30c291ef73bcb7e574e07a72b5362da04 (diff) | |
| download | bcm5719-llvm-11dd42453935c5f92bf7b4501c863a9e399031ef.tar.gz bcm5719-llvm-11dd42453935c5f92bf7b4501c863a9e399031ef.zip | |
Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits. Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.
llvm-svn: 52098
Diffstat (limited to 'llvm/lib/Target/PowerPC')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index f528143a8ba..beb03d0e598 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -1173,7 +1173,7 @@ SDOperand PPCTargetLowering::LowerSETCC(SDOperand Op, SelectionDAG &DAG) { if (C->isNullValue() && CC == ISD::SETEQ) { MVT VT = Op.getOperand(0).getValueType(); SDOperand Zext = Op.getOperand(0); - if (VT < MVT::i32) { + if (VT.bitsLT(MVT::i32)) { VT = MVT::i32; Zext = DAG.getNode(ISD::ZERO_EXTEND, VT, Op.getOperand(0)); } |

