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| author | Hal Finkel <hfinkel@anl.gov> | 2014-12-23 08:38:50 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2014-12-23 08:38:50 +0000 |
| commit | 04b16b51ec2903f1be8a4f9297a24e73b0bbda52 (patch) | |
| tree | bc06ba5ca5da696894c4c1df7c8fa4998d9b42fa /llvm/lib/Target/PowerPC | |
| parent | 5313da32638e64ec40668877b1b85f68455866e5 (diff) | |
| download | bcm5719-llvm-04b16b51ec2903f1be8a4f9297a24e73b0bbda52.tar.gz bcm5719-llvm-04b16b51ec2903f1be8a4f9297a24e73b0bbda52.zip | |
[PowerPC] Don't attempt a 64-bit pow2 division on PPC32
In r224033, in moving the signed power-of-2 division expansion into
BuildSDIVPow2, I accidentally made it possible to attempt the lowering for a
64-bit division on PPC32. This later asserts.
Fixes PR21928.
llvm-svn: 224758
Diffstat (limited to 'llvm/lib/Target/PowerPC')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 62c1f714e9d..18384627ced 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -8966,6 +8966,8 @@ PPCTargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor, std::vector<SDNode *> *Created) const { // fold (sdiv X, pow2) EVT VT = N->getValueType(0); + if (VT == MVT::i64 && !Subtarget.isPPC64()) + return SDValue(); if ((VT != MVT::i32 && VT != MVT::i64) || !(Divisor.isPowerOf2() || (-Divisor).isPowerOf2())) return SDValue(); |
