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author | Misha Brukman <brukman+llvm@gmail.com> | 2004-07-16 20:51:55 +0000 |
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committer | Misha Brukman <brukman+llvm@gmail.com> | 2004-07-16 20:51:55 +0000 |
commit | 3adf84ba0d89edee9ae350b6cfb1b2f8d773338a (patch) | |
tree | e513bc20091b3b11093ebbe6eaf1ff2c1e5680a1 /llvm/lib/Target/PowerPC/PowerPCInstrInfo.cpp | |
parent | f0def96a36557756df14bf41e8eb1cc90fb012bf (diff) | |
download | bcm5719-llvm-3adf84ba0d89edee9ae350b6cfb1b2f8d773338a.tar.gz bcm5719-llvm-3adf84ba0d89edee9ae350b6cfb1b2f8d773338a.zip |
Implement PowerPCInstrInfo::isMoveInstr(), patch by Nate Begeman
llvm-svn: 14898
Diffstat (limited to 'llvm/lib/Target/PowerPC/PowerPCInstrInfo.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PowerPCInstrInfo.cpp | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PowerPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PowerPCInstrInfo.cpp index 8340e783a67..778b55c81fd 100644 --- a/llvm/lib/Target/PowerPC/PowerPCInstrInfo.cpp +++ b/llvm/lib/Target/PowerPC/PowerPCInstrInfo.cpp @@ -15,8 +15,37 @@ #include "PowerPC.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "PowerPCGenInstrInfo.inc" +#include <iostream> using namespace llvm; PowerPCInstrInfo::PowerPCInstrInfo() : TargetInstrInfo(PowerPCInsts, sizeof(PowerPCInsts)/sizeof(PowerPCInsts[0])){ } + +bool PowerPCInstrInfo::isMoveInstr(const MachineInstr& MI, + unsigned& sourceReg, + unsigned& destReg) const { + MachineOpCode oc = MI.getOpcode(); + if (oc == PPC32::OR) { + assert(MI.getNumOperands() == 3 && + MI.getOperand(0).isRegister() && + MI.getOperand(1).isRegister() && + MI.getOperand(2).isRegister() && + "invalid register-register int move instruction"); + if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) { + sourceReg = MI.getOperand(1).getReg(); + destReg = MI.getOperand(0).getReg(); + return true; + } + } + else if (oc == PPC32::FMR) { + assert(MI.getNumOperands() == 2 && + MI.getOperand(0).isRegister() && + MI.getOperand(1).isRegister() && + "invalid register-register fp move instruction"); + sourceReg = MI.getOperand(1).getReg(); + destReg = MI.getOperand(0).getReg(); + return true; + } + return false; +} |