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authorChris Lattner <sabre@nondot.org>2005-04-19 04:32:54 +0000
committerChris Lattner <sabre@nondot.org>2005-04-19 04:32:54 +0000
commitc7cb8c77fbe6837214c91b3be484e160c159725d (patch)
treef3151d6beb445c99226656ae8ac668d32e035f70 /llvm/lib/Target/PowerPC/PowerPCInstrFormats.td
parentef94374a1c50ccbbba67e48f051d30e6f4450f4a (diff)
downloadbcm5719-llvm-c7cb8c77fbe6837214c91b3be484e160c159725d.tar.gz
bcm5719-llvm-c7cb8c77fbe6837214c91b3be484e160c159725d.zip
Turn PPC64 and VMX into classes that can be added to instructions instead of
bits that must be passed up the inheritance hierarchy. Convert MForm and AForm instructions over llvm-svn: 21345
Diffstat (limited to 'llvm/lib/Target/PowerPC/PowerPCInstrFormats.td')
-rw-r--r--llvm/lib/Target/PowerPC/PowerPCInstrFormats.td26
1 files changed, 12 insertions, 14 deletions
diff --git a/llvm/lib/Target/PowerPC/PowerPCInstrFormats.td b/llvm/lib/Target/PowerPC/PowerPCInstrFormats.td
index e2cec77aac2..7c5cd1a489a 100644
--- a/llvm/lib/Target/PowerPC/PowerPCInstrFormats.td
+++ b/llvm/lib/Target/PowerPC/PowerPCInstrFormats.td
@@ -459,8 +459,8 @@ class XOForm_3<bits<6> opcode, bits<9> xo, bit oe, bit rc, bit ppc64, bit vmx,
}
// 1.7.12 A-Form
-class AForm_1<bits<6> opcode, bits<5> xo, bit rc, bit ppc64, bit vmx,
- dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
+class AForm_1<bits<6> opcode, bits<5> xo, bit rc, dag OL, string asmstr>
+ : I<opcode, 0, 0, OL, asmstr> {
bits<5> FRT;
bits<5> FRA;
bits<5> FRC;
@@ -474,21 +474,20 @@ class AForm_1<bits<6> opcode, bits<5> xo, bit rc, bit ppc64, bit vmx,
let Inst{31} = rc;
}
-class AForm_2<bits<6> opcode, bits<5> xo, bit rc, bit ppc64, bit vmx, dag OL,
- string asmstr>
- : AForm_1<opcode, xo, rc, ppc64, vmx, OL, asmstr> {
+class AForm_2<bits<6> opcode, bits<5> xo, bit rc, dag OL, string asmstr>
+ : AForm_1<opcode, xo, rc, OL, asmstr> {
let FRC = 0;
}
-class AForm_3<bits<6> opcode, bits<5> xo, bit rc, bit ppc64, bit vmx, dag OL,
+class AForm_3<bits<6> opcode, bits<5> xo, bit rc, dag OL,
string asmstr>
- : AForm_1<opcode, xo, rc, ppc64, vmx, OL, asmstr> {
+ : AForm_1<opcode, xo, rc, OL, asmstr> {
let FRB = 0;
}
// 1.7.13 M-Form
-class MForm_1<bits<6> opcode, bit rc, bit ppc64, bit vmx,
- dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
+class MForm_1<bits<6> opcode, bit rc, dag OL, string asmstr>
+ : I<opcode, 0, 0, OL, asmstr> {
bits<5> RA;
bits<5> RS;
bits<5> RB;
@@ -503,14 +502,13 @@ class MForm_1<bits<6> opcode, bit rc, bit ppc64, bit vmx,
let Inst{31} = rc;
}
-class MForm_2<bits<6> opcode, bit rc, bit ppc64, bit vmx,
- dag OL, string asmstr>
- : MForm_1<opcode, rc, ppc64, vmx, OL, asmstr> {
+class MForm_2<bits<6> opcode, bit rc, dag OL, string asmstr>
+ : MForm_1<opcode, rc, OL, asmstr> {
}
// 1.7.14 MD-Form
-class MDForm_1<bits<6> opcode, bits<3> xo, bit rc, bit ppc64, bit vmx,
- dag OL, string asmstr> : I<opcode, ppc64, vmx, OL, asmstr> {
+class MDForm_1<bits<6> opcode, bits<3> xo, bit rc,
+ dag OL, string asmstr> : I<opcode, 0, 0, OL, asmstr> {
bits<5> RS;
bits<5> RA;
bits<6> SH;
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