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authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>2016-09-22 09:52:19 +0000
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>2016-09-22 09:52:19 +0000
commit6e7879c5e6e26c2c6d00618f12af20012eecff41 (patch)
treee75271eca7c8a4f68a884aad96748b64ab021bb5 /llvm/lib/Target/PowerPC/PPCSubtarget.h
parent2ce2ab3a4dc1df6ec87a42aa2baa6741c2456e0c (diff)
downloadbcm5719-llvm-6e7879c5e6e26c2c6d00618f12af20012eecff41.tar.gz
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[Power9] Add exploitation of non-permuting memory ops
This patch corresponds to review: https://reviews.llvm.org/D19825 The new lxvx/stxvx instructions do not require the swaps to line the elements up correctly. In order to select them over the lxvd2x/lxvw4x instructions which require swaps, the patterns for the old instruction have a predicate that ensures they won't be selected on Power9 and newer CPUs. llvm-svn: 282143
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCSubtarget.h')
-rw-r--r--llvm/lib/Target/PowerPC/PPCSubtarget.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h
index f58c7c10c8b..d80a9ad8d34 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.h
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h
@@ -277,6 +277,9 @@ public:
bool hasFloat128() const { return HasFloat128; }
bool isISA3_0() const { return IsISA3_0; }
bool useLongCalls() const { return UseLongCalls; }
+ bool needsSwapsForVSXMemOps() const {
+ return hasVSX() && isLittleEndian() && !hasP9Vector();
+ }
POPCNTDKind hasPOPCNTD() const { return HasPOPCNTD; }
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