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| author | Hal Finkel <hfinkel@anl.gov> | 2015-01-03 01:16:37 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2015-01-03 01:16:37 +0000 |
| commit | 4edc66b8de9672fcb0d8ef4059d2658dd351c6f0 (patch) | |
| tree | c0dcc91c1c6d9c2ce38a2abcb0c60d3a4e9b9268 /llvm/lib/Target/PowerPC/PPCSubtarget.h | |
| parent | 4c059622d534eb4f14805985a4c3fe4a7580f8da (diff) | |
| download | bcm5719-llvm-4edc66b8de9672fcb0d8ef4059d2658dd351c6f0.tar.gz bcm5719-llvm-4edc66b8de9672fcb0d8ef4059d2658dd351c6f0.zip | |
[PowerPC] Add support for the CMPB instruction
Newer POWER cores, and the A2, support the cmpb instruction. This instruction
compares its operands, treating each of the 8 bytes in the GPRs separately,
returning a 'mask' result of 0 (for false) or -1 (for true) in each byte.
Code generation support is added, in the form of a PPCISelDAGToDAG
DAG-preprocessing routine, that recognizes patterns close to what the
instruction computes (either exactly, or related by a constant masking
operation), and generates the cmpb instruction (along with any necessary
constant masking operation). This can be expanded if use cases arise.
llvm-svn: 225106
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCSubtarget.h')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCSubtarget.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h index 1df19c3e1eb..de5f92a971b 100644 --- a/llvm/lib/Target/PowerPC/PPCSubtarget.h +++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h @@ -102,6 +102,7 @@ protected: bool HasFPCVT; bool HasISEL; bool HasPOPCNTD; + bool HasCMPB; bool HasLDBRX; bool IsBookE; bool HasOnlyMSYNC; @@ -220,6 +221,7 @@ public: bool hasMFOCRF() const { return HasMFOCRF; } bool hasISEL() const { return HasISEL; } bool hasPOPCNTD() const { return HasPOPCNTD; } + bool hasCMPB() const { return HasCMPB; } bool hasLDBRX() const { return HasLDBRX; } bool isBookE() const { return IsBookE; } bool hasOnlyMSYNC() const { return HasOnlyMSYNC; } |
