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authorHal Finkel <hfinkel@anl.gov>2013-03-28 19:25:55 +0000
committerHal Finkel <hfinkel@anl.gov>2013-03-28 19:25:55 +0000
commit31d2956510b8484373fe244547b4f811430a28ff (patch)
tree8bdb71b918d6c0746149c1e7a9158abd3a15243b /llvm/lib/Target/PowerPC/PPCSubtarget.h
parent772cf466dab6beadf3cab40722cf6cf10342f808 (diff)
downloadbcm5719-llvm-31d2956510b8484373fe244547b4f811430a28ff.tar.gz
bcm5719-llvm-31d2956510b8484373fe244547b4f811430a28ff.zip
Add the PPC64 ldbrx/stdbrx instructions
These are 64-bit load/store with byte-swap, and available on the P7 and the A2. Like the similar instructions for 16- and 32-bit words, these are matched in the target DAG-combine phase against load/store-bswap pairs. llvm-svn: 178276
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCSubtarget.h')
-rw-r--r--llvm/lib/Target/PowerPC/PPCSubtarget.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h
index 070a9a9485f..36436f6e407 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.h
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h
@@ -80,6 +80,7 @@ protected:
bool HasSTFIWX;
bool HasISEL;
bool HasPOPCNTD;
+ bool HasLDBRX;
bool IsBookE;
bool HasLazyResolverStubs;
bool IsJITCodeModel;
@@ -161,6 +162,7 @@ public:
bool hasMFOCRF() const { return HasMFOCRF; }
bool hasISEL() const { return HasISEL; }
bool hasPOPCNTD() const { return HasPOPCNTD; }
+ bool hasLDBRX() const { return HasLDBRX; }
bool isBookE() const { return IsBookE; }
const Triple &getTargetTriple() const { return TargetTriple; }
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