diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2013-09-11 23:05:25 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-09-11 23:05:25 +0000 |
| commit | 21442b24fb974e45fb800e0da0ab2cdeeb4e6696 (patch) | |
| tree | 28c2ff2e7a239f99967b8281020e88707577c502 /llvm/lib/Target/PowerPC/PPCSubtarget.h | |
| parent | 206d4c46784e175293e486980f0dd9b1ebab7a0d (diff) | |
| download | bcm5719-llvm-21442b24fb974e45fb800e0da0ab2cdeeb4e6696.tar.gz bcm5719-llvm-21442b24fb974e45fb800e0da0ab2cdeeb4e6696.zip | |
Enable MI scheduling (and CodeGen AA) by default for embedded PPC cores
For embedded PPC cores (especially the A2 core), using the MI scheduler with AA
is far superior to the other scheduling options.
llvm-svn: 190558
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCSubtarget.h')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCSubtarget.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h index a933bf69bbe..179ceb5e36c 100644 --- a/llvm/lib/Target/PowerPC/PPCSubtarget.h +++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h @@ -207,6 +207,14 @@ public: bool enablePostRAScheduler(CodeGenOpt::Level OptLevel, TargetSubtargetInfo::AntiDepBreakMode& Mode, RegClassVector& CriticalPathRCs) const; + + // Scheduling customization. + bool enableMachineScheduler() const; + void overrideSchedPolicy(MachineSchedPolicy &Policy, + MachineInstr *begin, + MachineInstr *end, + unsigned NumRegionInstrs) const; + bool useAA() const; }; } // End llvm namespace |
