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| author | Hal Finkel <hfinkel@anl.gov> | 2012-04-01 19:22:40 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-04-01 19:22:40 +0000 |
| commit | 9f9f8929ee7a36e8cf33599fdd3f2bccd411401f (patch) | |
| tree | 591e7e9cffed2c9b1cc1305ec668657ca066b359 /llvm/lib/Target/PowerPC/PPCSubtarget.cpp | |
| parent | 91773ab2cafab5bd74afceadb06b1ccd8b8906a4 (diff) | |
| download | bcm5719-llvm-9f9f8929ee7a36e8cf33599fdd3f2bccd411401f.tar.gz bcm5719-llvm-9f9f8929ee7a36e8cf33599fdd3f2bccd411401f.zip | |
Add instruction itinerary for the PPC64 A2 core.
This adds a full itinerary for IBM's PPC64 A2 embedded core. These
cores form the basis for the CPUs in the new IBM BG/Q supercomputer.
llvm-svn: 153842
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCSubtarget.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp index c89fab3356c..fa54a440294 100644 --- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp +++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp @@ -146,7 +146,7 @@ bool PPCSubtarget::enablePostRAScheduler( CodeGenOpt::Level OptLevel, TargetSubtargetInfo::AntiDepBreakMode& Mode, RegClassVector& CriticalPathRCs) const { - if (DarwinDirective == PPC::DIR_440) + if (DarwinDirective == PPC::DIR_440 || DarwinDirective == PPC::DIR_A2) return false; Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL; |
