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authorHal Finkel <hfinkel@anl.gov>2015-01-03 01:16:37 +0000
committerHal Finkel <hfinkel@anl.gov>2015-01-03 01:16:37 +0000
commit4edc66b8de9672fcb0d8ef4059d2658dd351c6f0 (patch)
treec0dcc91c1c6d9c2ce38a2abcb0c60d3a4e9b9268 /llvm/lib/Target/PowerPC/PPCSubtarget.cpp
parent4c059622d534eb4f14805985a4c3fe4a7580f8da (diff)
downloadbcm5719-llvm-4edc66b8de9672fcb0d8ef4059d2658dd351c6f0.tar.gz
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[PowerPC] Add support for the CMPB instruction
Newer POWER cores, and the A2, support the cmpb instruction. This instruction compares its operands, treating each of the 8 bytes in the GPRs separately, returning a 'mask' result of 0 (for false) or -1 (for true) in each byte. Code generation support is added, in the form of a PPCISelDAGToDAG DAG-preprocessing routine, that recognizes patterns close to what the instruction computes (either exactly, or related by a constant masking operation), and generates the cmpb instruction (along with any necessary constant masking operation). This can be expanded if use cases arise. llvm-svn: 225106
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCSubtarget.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCSubtarget.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
index 8f0e3a49ee9..fb47c910c2f 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -108,6 +108,7 @@ void PPCSubtarget::initializeEnvironment() {
HasFPCVT = false;
HasISEL = false;
HasPOPCNTD = false;
+ HasCMPB = false;
HasLDBRX = false;
IsBookE = false;
HasOnlyMSYNC = false;
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