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| author | Anton Korobeynikov <asl@math.spbu.ru> | 2010-04-18 20:31:01 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2010-04-18 20:31:01 +0000 |
| commit | 7d62e332911b6d406edbfe2b8bab71d62085a4db (patch) | |
| tree | 995f0bc0ac73e3237a69b65ff5078f2ac6db8a54 /llvm/lib/Target/PowerPC/PPCScheduleG4.td | |
| parent | 247a138ec6d42f9382413fc1bd4415c26b9097e0 (diff) | |
| download | bcm5719-llvm-7d62e332911b6d406edbfe2b8bab71d62085a4db.tar.gz bcm5719-llvm-7d62e332911b6d406edbfe2b8bab71d62085a4db.zip | |
Make processor FUs unique for given itinerary. This extends the limit of 32
FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.
llvm-svn: 101754
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCScheduleG4.td')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCScheduleG4.td | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCScheduleG4.td b/llvm/lib/Target/PowerPC/PPCScheduleG4.td index 92ed20f17ce..7efc693fa8c 100644 --- a/llvm/lib/Target/PowerPC/PPCScheduleG4.td +++ b/llvm/lib/Target/PowerPC/PPCScheduleG4.td @@ -11,7 +11,8 @@ // //===----------------------------------------------------------------------===// -def G4Itineraries : ProcessorItineraries<[ +def G4Itineraries : ProcessorItineraries< + [IU1, IU2, SLU, SRU, BPU, FPU1, VIU1, VIU2, VPU, VFPU], [ InstrItinData<IntGeneral , [InstrStage<1, [IU1, IU2]>]>, InstrItinData<IntCompare , [InstrStage<1, [IU1, IU2]>]>, InstrItinData<IntDivW , [InstrStage<19, [IU1]>]>, |
