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authorJonas Paulsson <paulsson@linux.vnet.ibm.com>2018-01-31 09:26:51 +0000
committerJonas Paulsson <paulsson@linux.vnet.ibm.com>2018-01-31 09:26:51 +0000
commite6a8329e9fe72a83f0be2b5cef5a563957406773 (patch)
tree48c7e961af408fedb6e772bac3f0e4e4fe49d3bd /llvm/lib/Target/PowerPC/PPCRegisterInfo.h
parentaea4208720f2d98c908acf293819dd33f29b0465 (diff)
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[PowerPC] Return true in enableMultipleCopyHints().
Enable multiple COPY hints to eliminate more COPYs during register allocation. Note that this is something all targets should do, see https://reviews.llvm.org/D38128. Review: Nemanja Ivanovic llvm-svn: 323858
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCRegisterInfo.h')
-rw-r--r--llvm/lib/Target/PowerPC/PPCRegisterInfo.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.h b/llvm/lib/Target/PowerPC/PPCRegisterInfo.h
index 0bbb71fdf9f..91a98ee4efc 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.h
@@ -85,6 +85,8 @@ public:
BitVector getReservedRegs(const MachineFunction &MF) const override;
bool isCallerPreservedPhysReg(unsigned PhysReg, const MachineFunction &MF) const override;
+ bool enableMultipleCopyHints() const override { return true; }
+
/// We require the register scavenger.
bool requiresRegisterScavenging(const MachineFunction &MF) const override {
return true;
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