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authorEvan Cheng <evan.cheng@apple.com>2007-12-02 08:30:39 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-12-02 08:30:39 +0000
commitf45a1d623cce45fb716555214a92ef3a759c9592 (patch)
tree04a2dba71ecb5aa16b79ee39d26ec97d49caf65d /llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
parent310369fb8440064d623ae8f63354c815de47dcc6 (diff)
downloadbcm5719-llvm-f45a1d623cce45fb716555214a92ef3a759c9592.tar.gz
bcm5719-llvm-f45a1d623cce45fb716555214a92ef3a759c9592.zip
Remove redundant foldMemoryOperand variants and other code clean up.
llvm-svn: 44517
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp7
1 files changed, 5 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 28c1fcba29b..09b0e515790 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -555,11 +555,14 @@ BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
/// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
/// copy instructions, turning them into load/store instructions.
MachineInstr *PPCRegisterInfo::foldMemoryOperand(MachineInstr *MI,
- unsigned OpNum,
- int FrameIndex) const {
+ SmallVectorImpl<unsigned> &Ops,
+ int FrameIndex) const {
+ if (Ops.size() != 1) return NULL;
+
// Make sure this is a reg-reg copy. Note that we can't handle MCRF, because
// it takes more than one instruction to store it.
unsigned Opc = MI->getOpcode();
+ unsigned OpNum = Ops[0];
MachineInstr *NewMI = NULL;
if ((Opc == PPC::OR &&
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