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authorRoman Divacky <rdivacky@freebsd.org>2011-06-17 15:21:10 +0000
committerRoman Divacky <rdivacky@freebsd.org>2011-06-17 15:21:10 +0000
commitd041962c20740eb43f51849fd34d20d4a54b22ff (patch)
tree913fdd3d15086342fb1523f2bb19d8cb2ed4693b /llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
parentddaae52a4e494df24f1e198bbf81f395899a0dd1 (diff)
downloadbcm5719-llvm-d041962c20740eb43f51849fd34d20d4a54b22ff.tar.gz
bcm5719-llvm-d041962c20740eb43f51849fd34d20d4a54b22ff.zip
Fix a few places where 32bit instructions/registerset were used on PPC64.
llvm-svn: 133260
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 3374e9b0b63..fd62a88136c 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -504,6 +504,7 @@ void PPCRegisterInfo::lowerCRSpilling(MachineBasicBlock::iterator II,
const TargetRegisterClass *RC = Subtarget.isPPC64() ? G8RC : GPRC;
unsigned Reg = findScratchRegister(II, RS, RC, SPAdj);
unsigned SrcReg = MI.getOperand(0).getReg();
+ bool LP64 = Subtarget.isPPC64();
// We need to store the CR in the low 4-bits of the saved value. First, issue
// an MFCRpsued to save all of the CRBits and, if needed, kill the SrcReg.
@@ -520,7 +521,7 @@ void PPCRegisterInfo::lowerCRSpilling(MachineBasicBlock::iterator II,
.addImm(0)
.addImm(31);
- addFrameReference(BuildMI(MBB, II, dl, TII.get(PPC::STW))
+ addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::STW8 : PPC::STW))
.addReg(Reg, getKillRegState(MI.getOperand(1).getImm())),
FrameIndex);
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