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author | Yi-Hong Lyu <Yi-Hong.Lyu@ibm.com> | 2019-09-12 06:49:02 +0000 |
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committer | Yi-Hong Lyu <Yi-Hong.Lyu@ibm.com> | 2019-11-08 15:32:31 +0000 |
commit | a3db9c08ebdf1f39ed89f4a7afa09fc153cf98c5 (patch) | |
tree | 285bb4f1cfea51ba911e3e18d5aa370a6dae62e9 /llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | |
parent | 9ee76ab37f1efa91432ec4efcba05819ccaeb2b1 (diff) | |
download | bcm5719-llvm-a3db9c08ebdf1f39ed89f4a7afa09fc153cf98c5.tar.gz bcm5719-llvm-a3db9c08ebdf1f39ed89f4a7afa09fc153cf98c5.zip |
[PowerPC] Remove redundant CRSET/CRUNSET in custom lowering of known CR bit spills
We lower known CR bit spills (CRSET/CRUNSET) to load and spill the known value
but forgot to remove the redundant spills.
e.g., This sequence was used to spill a CRUNSET:
crclr 4*cr5+lt
mfocrf r3,4
rlwinm r3,r3,20,0,0
stw r3,132(r1)
Custom lowering of known CR bit spills lower it to:
crxor 4*cr5+lt, 4*cr5+lt, 4*cr5+lt
li r3,0
stw r3,132(r1)
crxor is redundant if there is no use of 4*cr5+lt so we should remove it
Differential revision: https://reviews.llvm.org/D67722
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp index 9ec26a19bda..90193c2e9e0 100644 --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -747,12 +747,18 @@ void PPCRegisterInfo::lowerCRBitSpilling(MachineBasicBlock::iterator II, Register SrcReg = MI.getOperand(0).getReg(); // Search up the BB to find the definition of the CR bit. - MachineBasicBlock::reverse_iterator Ins; + MachineBasicBlock::reverse_iterator Ins = MI; + MachineBasicBlock::reverse_iterator Rend = MBB.rend(); + ++Ins; unsigned CRBitSpillDistance = 0; - for (Ins = MI; Ins != MBB.rend(); Ins++) { + bool SeenUse = false; + for (; Ins != Rend; ++Ins) { // Definition found. if (Ins->modifiesRegister(SrcReg, TRI)) break; + // Use found. + if (Ins->readsRegister(SrcReg, TRI)) + SeenUse = true; // Unable to find CR bit definition within maximum search distance. if (CRBitSpillDistance == MaxCRBitSpillDist) { Ins = MI; @@ -767,15 +773,18 @@ void PPCRegisterInfo::lowerCRBitSpilling(MachineBasicBlock::iterator II, if (Ins == MBB.rend()) Ins = MI; + bool SpillsKnownBit = false; // There is no need to extract the CR bit if its value is already known. switch (Ins->getOpcode()) { case PPC::CRUNSET: BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::LI8 : PPC::LI), Reg) .addImm(0); + SpillsKnownBit = true; break; case PPC::CRSET: BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::LIS8 : PPC::LIS), Reg) .addImm(-32768); + SpillsKnownBit = true; break; default: // We need to move the CR field that contains the CR bit we are spilling. @@ -803,8 +812,13 @@ void PPCRegisterInfo::lowerCRBitSpilling(MachineBasicBlock::iterator II, .addReg(Reg, RegState::Kill), FrameIndex); + bool KillsCRBit = MI.killsRegister(SrcReg, TRI); // Discard the pseudo instruction. MBB.erase(II); + if (SpillsKnownBit && KillsCRBit && !SeenUse) { + Ins->setDesc(TII.get(PPC::UNENCODED_NOP)); + Ins->RemoveOperand(0); + } } void PPCRegisterInfo::lowerCRBitRestore(MachineBasicBlock::iterator II, |