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| author | Hal Finkel <hfinkel@anl.gov> | 2012-03-22 05:28:19 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-03-22 05:28:19 +0000 |
| commit | 76eb187c0fcda1ecb5bc721c480bb904924856ac (patch) | |
| tree | 339c930f4b91f2c1b3d265f76de5e57006656d59 /llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | |
| parent | 8c9739eedac4c61e7d0d8234ec6e5db17ada70f5 (diff) | |
| download | bcm5719-llvm-76eb187c0fcda1ecb5bc721c480bb904924856ac.tar.gz bcm5719-llvm-76eb187c0fcda1ecb5bc721c480bb904924856ac.zip | |
PPC::DBG_VALUE must use Reg+Imm frame-index elimination even for large offsets. Fixes PR12203.
I don't have a small test case yet, but I'll try to construct one.
llvm-svn: 153240
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp index 2976f010f6a..ef1357137de 100644 --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -554,7 +554,8 @@ PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, // clear can be encoded. This is extremely uncommon, because normally you // only "std" to a stack slot that is at least 4-byte aligned, but it can // happen in invalid code. - if (isInt<16>(Offset) && (!isIXAddr || (Offset & 3) == 0)) { + if (OpC == PPC::DBG_VALUE || // DBG_VALUE is always Reg+Imm + (isInt<16>(Offset) && (!isIXAddr || (Offset & 3) == 0))) { if (isIXAddr) Offset >>= 2; // The actual encoded value has the low two bits zero. MI.getOperand(OffsetOperandNo).ChangeToImmediate(Offset); |
