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| author | Hal Finkel <hfinkel@anl.gov> | 2013-03-28 03:38:16 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-28 03:38:16 +0000 |
| commit | 035b4825ce208d4acdf26750384da5d4aa7584dd (patch) | |
| tree | de2e908abc4a2e8d8ff7d900b778dabf36adff0b /llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | |
| parent | 25aab010585685558f2830c03b2f59cdd8e27cc7 (diff) | |
| download | bcm5719-llvm-035b4825ce208d4acdf26750384da5d4aa7584dd.tar.gz bcm5719-llvm-035b4825ce208d4acdf26750384da5d4aa7584dd.zip | |
Cleanup PPC CR-spill kill flags and 32- vs. 64-bit instructions
There were a few places where kill flags were not being set correctly, and
where 32-bit instruction variants were being used with 64-bit registers. After
r178180, this code was being triggered causing llc to assert.
llvm-svn: 178220
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp index b48305e9cf4..ecfa5527513 100644 --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -334,7 +334,7 @@ void PPCRegisterInfo::lowerCRSpilling(MachineBasicBlock::iterator II, } addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::STW8 : PPC::STW)) - .addReg(Reg, getKillRegState(MI.getOperand(1).getImm())), + .addReg(Reg, RegState::Kill), FrameIndex); // Discard the pseudo instruction. @@ -399,7 +399,7 @@ void PPCRegisterInfo::lowerVRSAVESpilling(MachineBasicBlock::iterator II, .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill())); addFrameReference(BuildMI(MBB, II, dl, TII.get(PPC::STW)) - .addReg(Reg, getKillRegState(MI.getOperand(1).getImm())), + .addReg(Reg, RegState::Kill), FrameIndex); // Discard the pseudo instruction. |
