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authorYi-Hong Lyu <Yi-Hong.Lyu@ibm.com>2019-09-12 06:49:02 +0000
committerYi-Hong Lyu <Yi-Hong.Lyu@ibm.com>2019-11-08 15:32:31 +0000
commita3db9c08ebdf1f39ed89f4a7afa09fc153cf98c5 (patch)
tree285bb4f1cfea51ba911e3e18d5aa370a6dae62e9 /llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
parent9ee76ab37f1efa91432ec4efcba05819ccaeb2b1 (diff)
downloadbcm5719-llvm-a3db9c08ebdf1f39ed89f4a7afa09fc153cf98c5.tar.gz
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[PowerPC] Remove redundant CRSET/CRUNSET in custom lowering of known CR bit spills
We lower known CR bit spills (CRSET/CRUNSET) to load and spill the known value but forgot to remove the redundant spills. e.g., This sequence was used to spill a CRUNSET: crclr 4*cr5+lt mfocrf r3,4 rlwinm r3,r3,20,0,0 stw r3,132(r1) Custom lowering of known CR bit spills lower it to: crxor 4*cr5+lt, 4*cr5+lt, 4*cr5+lt li r3,0 stw r3,132(r1) crxor is redundant if there is no use of 4*cr5+lt so we should remove it Differential revision: https://reviews.llvm.org/D67722
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp17
1 files changed, 16 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp b/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
index 15c09a5a868..a4b4bf2973d 100644
--- a/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
+++ b/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
@@ -163,8 +163,19 @@ namespace {
}
bool runOnMachineFunction(MachineFunction &MF) override {
- if (skipFunction(MF.getFunction()) || !RunPreEmitPeephole)
+ if (skipFunction(MF.getFunction()) || !RunPreEmitPeephole) {
+ // Remove UNENCODED_NOP even when this pass is disabled.
+ // This needs to be done unconditionally so we don't emit zeros
+ // in the instruction stream.
+ SmallVector<MachineInstr *, 4> InstrsToErase;
+ for (MachineBasicBlock &MBB : MF)
+ for (MachineInstr &MI : MBB)
+ if (MI.getOpcode() == PPC::UNENCODED_NOP)
+ InstrsToErase.push_back(&MI);
+ for (MachineInstr *MI : InstrsToErase)
+ MI->eraseFromParent();
return false;
+ }
bool Changed = false;
const PPCInstrInfo *TII = MF.getSubtarget<PPCSubtarget>().getInstrInfo();
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
@@ -173,6 +184,10 @@ namespace {
Changed |= removeRedundantLIs(MBB, TRI);
for (MachineInstr &MI : MBB) {
unsigned Opc = MI.getOpcode();
+ if (Opc == PPC::UNENCODED_NOP) {
+ InstrsToErase.push_back(&MI);
+ continue;
+ }
// Detect self copies - these can result from running AADB.
if (PPCInstrInfo::isSameClassPhysRegCopy(Opc)) {
const MCInstrDesc &MCID = TII->get(Opc);
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