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author | Hal Finkel <hfinkel@anl.gov> | 2015-02-01 15:03:28 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2015-02-01 15:03:28 +0000 |
commit | e6698d5305a29a186e035ab737931a139d70bcd2 (patch) | |
tree | b8a181eaaaf86cc20444f94cf9b7f23a96e5c02d /llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h | |
parent | 1b3961c0195acc5bca165743a101b2f4e5717edb (diff) | |
download | bcm5719-llvm-e6698d5305a29a186e035ab737931a139d70bcd2.tar.gz bcm5719-llvm-e6698d5305a29a186e035ab737931a139d70bcd2.zip |
[PowerPC] Make r2 allocatable on PPC64/ELF for some leaf functions
The TOC base pointer is passed in r2, and we normally reserve this register so
that we can depend on it being there. However, for leaf functions, and
specifically those leaf functions that don't do any TOC access of their own
(which is generally due to accessing the constant pool, using TLS, etc.),
we can treat r2 as an ordinary callee-saved register (it must be callee-saved
because, for local direct calls, the linker will not insert any save/restore
code).
The allocation order has been changed slightly for PPC64/ELF systems to put r2
at the end of the list (while leaving it near the beginning for Darwin systems
to prevent unnecessary output changes). While r2 is allocatable, using it still
requires spill/restore traffic, and thus comes at the end of the list.
llvm-svn: 227745
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h index 37b2ff83c45..607cdf612ee 100644 --- a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h +++ b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h @@ -62,6 +62,9 @@ class PPCFunctionInfo : public MachineFunctionInfo { /// entry, even though LR may otherwise apparently not be used. bool LRStoreRequired; + /// This function makes use of the PPC64 ELF TOC base pointer (register r2). + bool UsesTOCBasePtr; + /// MinReservedArea - This is the frame size that is at least reserved in a /// potential caller (parameter+linkage area). unsigned MinReservedArea; @@ -112,6 +115,7 @@ public: SpillsCR(false), SpillsVRSAVE(false), LRStoreRequired(false), + UsesTOCBasePtr(false), MinReservedArea(0), TailCallSPDelta(0), HasFastCall(false), @@ -164,6 +168,9 @@ public: void setLRStoreRequired() { LRStoreRequired = true; } bool isLRStoreRequired() const { return LRStoreRequired; } + void setUsesTOCBasePtr() { UsesTOCBasePtr = true; } + bool usesTOCBasePtr() const { return UsesTOCBasePtr; } + void setHasFastCall() { HasFastCall = true; } bool hasFastCall() const { return HasFastCall;} |