summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
diff options
context:
space:
mode:
authorArnold Schwaighofer <arnold.schwaighofer@gmail.com>2008-04-30 09:16:33 +0000
committerArnold Schwaighofer <arnold.schwaighofer@gmail.com>2008-04-30 09:16:33 +0000
commitbe0de34ede6658914f90eb35d6ee2a5270f8ea8c (patch)
tree541c9bef8ee07515353f73a94bac984bef06ca19 /llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
parentbe5c91d3b3be5a131b30177da766c2fc418ea166 (diff)
downloadbcm5719-llvm-be0de34ede6658914f90eb35d6ee2a5270f8ea8c.tar.gz
bcm5719-llvm-be0de34ede6658914f90eb35d6ee2a5270f8ea8c.zip
Tail call optimization improvements:
Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. llvm-svn: 50477
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h')
-rw-r--r--llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h30
1 files changed, 28 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
index 5478455ed49..230ea0b0e04 100644
--- a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
@@ -43,19 +43,42 @@ private:
/// requires that the code generator produce a store of LR to the stack on
/// entry, even though LR may otherwise apparently not be used.
bool LRStoreRequired;
+
+ /// MinReservedArea - This is the frame size that is at least reserved in a
+ /// potential caller (parameter+linkage area).
+ unsigned MinReservedArea;
+
+ /// TailCallSPDelta - Stack pointer delta used when tail calling. Maximum
+ /// amount the stack pointer is adjusted to make the frame bigger for tail
+ /// calls. Used for creating an area before the register spill area.
+ int TailCallSPDelta;
+
+ /// HasFastCall - Does this function contain a fast call. Used to determine
+ /// how the caller's stack pointer should be calculated (epilog/dynamicalloc).
+ bool HasFastCall;
+
public:
PPCFunctionInfo(MachineFunction &MF)
: FramePointerSaveIndex(0),
ReturnAddrSaveIndex(0),
SpillsCR(false),
- LRStoreRequired(false) {}
+ LRStoreRequired(false),
+ MinReservedArea(0),
+ TailCallSPDelta(0),
+ HasFastCall(false) {}
int getFramePointerSaveIndex() const { return FramePointerSaveIndex; }
void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = Idx; }
int getReturnAddrSaveIndex() const { return ReturnAddrSaveIndex; }
void setReturnAddrSaveIndex(int idx) { ReturnAddrSaveIndex = idx; }
-
+
+ unsigned getMinReservedArea() const { return MinReservedArea; }
+ void setMinReservedArea(unsigned size) { MinReservedArea = size; }
+
+ int getTailCallSPDelta() const { return TailCallSPDelta; }
+ void setTailCallSPDelta(int size) { TailCallSPDelta = size; }
+
/// UsesLR - This is set when the prolog/epilog inserter does its initial scan
/// of the function, it is true if the LR/LR8 register is ever explicitly
/// accessed/clobbered in the machine function (e.g. by calls and movpctolr,
@@ -68,6 +91,9 @@ public:
void setLRStoreRequired() { LRStoreRequired = true; }
bool isLRStoreRequired() const { return LRStoreRequired; }
+
+ void setHasFastCall() { HasFastCall = true; }
+ bool hasFastCall() const { return HasFastCall;}
};
} // end of namespace llvm
OpenPOWER on IntegriCloud