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| author | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-10-16 03:36:29 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-10-16 03:36:29 +0000 |
| commit | ea8711b88e6c299b1abdb652b813f54f9340c23b (patch) | |
| tree | bcff63d5c1e39166499db0fdf1f554ac0fe71014 /llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp | |
| parent | ce72d611af0114d0a6a39f06960d5b75e90a2dd0 (diff) | |
| download | bcm5719-llvm-ea8711b88e6c299b1abdb652b813f54f9340c23b.tar.gz bcm5719-llvm-ea8711b88e6c299b1abdb652b813f54f9340c23b.zip | |
Re-commit r315885: [globalisel][tblgen] Add support for iPTR and implement am_unscaled* and am_indexed*
Summary:
iPTR is a pointer of subtarget-specific size to any address space. Therefore
type checks on this size derive the SizeInBits from a subtarget hook.
At this point, we can import the simplests G_LOAD rules and select load
instructions using them. Further patches will support for the predicates to
enable additional loads as well as the stores.
The previous commit failed on MSVC due to a failure to convert an
initializer_list to a std::vector. Hopefully, MSVC will accept this version.
Depends on D37457
Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar
Reviewed By: qcolombet
Subscribers: kristof.beyls, javed.absar, llvm-commits, igorb
Differential Revision: https://reviews.llvm.org/D37458
llvm-svn: 315887
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp')
0 files changed, 0 insertions, 0 deletions
