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| author | Chris Lattner <sabre@nondot.org> | 2010-11-16 00:55:51 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-11-16 00:55:51 +0000 |
| commit | 73716a600a4d6d7b39d422f3e21b70e8f35ea3b9 (patch) | |
| tree | 5153a8dd0d59b81505682cb2e478fd56f84b1789 /llvm/lib/Target/PowerPC/PPCMCCodeEmitter.cpp | |
| parent | 39aed737a6d9f0d1717b4055ce9cb971c73c5fb0 (diff) | |
| download | bcm5719-llvm-73716a600a4d6d7b39d422f3e21b70e8f35ea3b9.tar.gz bcm5719-llvm-73716a600a4d6d7b39d422f3e21b70e8f35ea3b9.zip | |
relax an assertion a bit, allowing the GPR argument of
these instructions to be encoded with getMachineOpValue.
This unbreaks ExecutionEngine/2003-01-04-ArgumentBug.ll
when running on a G5
llvm-svn: 119307
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCMCCodeEmitter.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCMCCodeEmitter.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCMCCodeEmitter.cpp b/llvm/lib/Target/PowerPC/PPCMCCodeEmitter.cpp index ea5275aa316..b4a1b19d8a1 100644 --- a/llvm/lib/Target/PowerPC/PPCMCCodeEmitter.cpp +++ b/llvm/lib/Target/PowerPC/PPCMCCodeEmitter.cpp @@ -199,7 +199,8 @@ unsigned PPCMCCodeEmitter:: getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixups) const { if (MO.isReg()) { - assert(MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF); + assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) || + MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); return PPCRegisterInfo::getRegisterNumbering(MO.getReg()); } |
