[PowerPC] Remove canFoldAsLoad from instruction definitions

The PowerPC backend had a number of loads that were marked as canFoldAsLoad
(and I'm partially at fault here for copying around the relevant line of
TableGen definitions without really looking at what it meant). This is not
right; PPC (non-memory) instructions don't support direct memory operands, and
so there is nothing a 'foldable' instruction could be folded into.

Noticed by inspection, no test case.

The one thing we might lose by doing this is ability to fold some loads into
stackmap/patchpoint pseudo-instructions. However, this was untested, and would
not obviously have worked for extending loads, and I'd rather re-add support
for that once it can be tested.

llvm-svn: 231982

1 files changed, 1 insertions, 1 deletions

diff --git a/llvm/lib/Target/PowerPC/PPCInstrQPX.td b/llvm/lib/Target/PowerPC/PPCInstrQPX.td
index c984d461d25..5c66b42690c 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrQPX.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrQPX.td
@@ -501,7 +501,7 @@ let Uses = [RM] in {
                       "qvflogical $FRT, $FRA, $FRB, $tttt", IIC_VecPerm, []>;
 
   // Load indexed instructions
-  let mayLoad = 1, canFoldAsLoad = 1 in {
+  let mayLoad = 1 in {
     def QVLFDX : XForm_1<31, 583,
                         (outs qfrc:$FRT), (ins memrr:$src),
                         "qvlfdx $FRT, $src", IIC_LdStLFD,