diff options
| author | Jinsong Ji <jji@us.ibm.com> | 2019-08-15 14:32:51 +0000 |
|---|---|---|
| committer | Jinsong Ji <jji@us.ibm.com> | 2019-08-15 14:32:51 +0000 |
| commit | 9fd81dc139027751ffe58dcc7c04ee1ff9ad0a6f (patch) | |
| tree | 706522d3410255de8a42713596a2fc6f3412acc0 /llvm/lib/Target/PowerPC/PPCInstrInfo.td | |
| parent | 9880b5dd2178b59b5f0204f628724abf5bc41f3d (diff) | |
| download | bcm5719-llvm-9fd81dc139027751ffe58dcc7c04ee1ff9ad0a6f.tar.gz bcm5719-llvm-9fd81dc139027751ffe58dcc7c04ee1ff9ad0a6f.zip | |
[PowerPC] Use xxleqv to set all one vector IMM(-1).
Summary:
xxspltib/vspltisb are 3 cycle PM instructions,
xxleqv is 2 cycle ALU instruction.
We should use xxleqv to set all one vectors.
Reviewers: hfinkel, nemanjai, steven.zhang
Subscribers: hiraditya, kbarton, MaskRay, shchenz, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65529
llvm-svn: 369006
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCInstrInfo.td')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.td | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index a9b0ce2f800..188c36f233d 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -386,7 +386,9 @@ def immZExt16 : PatLeaf<(imm), [{ // field. Used by instructions like 'ori'. return (uint64_t)N->getZExtValue() == (unsigned short)N->getZExtValue(); }], LO16>; -def immAnyExt8 : ImmLeaf<i32, [{ return isInt<8>(Imm) || isUInt<8>(Imm); }]>; +def immNonAllOneAnyExt8 : ImmLeaf<i32, [{ + return (isInt<8>(Imm) && (Imm != -1)) || (isUInt<8>(Imm) && (Imm != 0xFF)); +}]>; def immSExt5NonZero : ImmLeaf<i32, [{ return Imm && isInt<5>(Imm); }]>; // imm16Shifted* - These match immediates where the low 16-bits are zero. There |
