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authorKang Zhang <shkzhang@cn.ibm.com>2018-12-03 03:32:57 +0000
committerKang Zhang <shkzhang@cn.ibm.com>2018-12-03 03:32:57 +0000
commit51986417f9c412b321e3831afc2af79ac7fdcd62 (patch)
tree7b5f3d0bfd650c4d52c952968ef0fa16ac01a321 /llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
parent8b7653db7266c06ff3cdf29bd0be3cb40f6309c3 (diff)
downloadbcm5719-llvm-51986417f9c412b321e3831afc2af79ac7fdcd62.tar.gz
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[PowerPC] Fix inconsistent ImmMustBeMultipleOf for same instruction
Summary: There are 4 instructions which have Inconsistent ImmMustBeMultipleOf in the function PPCInstrInfo::instrHasImmForm, they are LFS, LFD, STFS, STFD. These four instructions should set the ImmMustBeMultipleOf to 1 instead of 4. Reviewed By: steven.zhang Differential Revision: https://reviews.llvm.org/D54738 llvm-svn: 348109
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrInfo.cpp16
1 files changed, 12 insertions, 4 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 559ed59bec9..0eaadd70a47 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -2984,8 +2984,10 @@ bool PPCInstrInfo::instrHasImmForm(const MachineInstr &MI,
if (PostRA) {
if (isVFReg(MI.getOperand(0).getReg()))
III.ImmOpcode = PPC::LXSSP;
- else
+ else {
III.ImmOpcode = PPC::LFS;
+ III.ImmMustBeMultipleOf = 1;
+ }
break;
}
LLVM_FALLTHROUGH;
@@ -2996,8 +2998,10 @@ bool PPCInstrInfo::instrHasImmForm(const MachineInstr &MI,
if (PostRA) {
if (isVFReg(MI.getOperand(0).getReg()))
III.ImmOpcode = PPC::LXSD;
- else
+ else {
III.ImmOpcode = PPC::LFD;
+ III.ImmMustBeMultipleOf = 1;
+ }
break;
}
LLVM_FALLTHROUGH;
@@ -3012,8 +3016,10 @@ bool PPCInstrInfo::instrHasImmForm(const MachineInstr &MI,
if (PostRA) {
if (isVFReg(MI.getOperand(0).getReg()))
III.ImmOpcode = PPC::STXSSP;
- else
+ else {
III.ImmOpcode = PPC::STFS;
+ III.ImmMustBeMultipleOf = 1;
+ }
break;
}
LLVM_FALLTHROUGH;
@@ -3024,8 +3030,10 @@ bool PPCInstrInfo::instrHasImmForm(const MachineInstr &MI,
if (PostRA) {
if (isVFReg(MI.getOperand(0).getReg()))
III.ImmOpcode = PPC::STXSD;
- else
+ else {
III.ImmOpcode = PPC::STFD;
+ III.ImmMustBeMultipleOf = 1;
+ }
break;
}
LLVM_FALLTHROUGH;
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