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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-01-08 23:11:11 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-01-08 23:11:11 +0000 |
| commit | 4a7b48d5f42b51fe51d967c15b6eb1880ee865c2 (patch) | |
| tree | c4d9d89cd14ae847383ebb06fb75349ec69b5f52 /llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | |
| parent | cf4d5ced0ffb70883d39643a0bdcd6931d84dd03 (diff) | |
| download | bcm5719-llvm-4a7b48d5f42b51fe51d967c15b6eb1880ee865c2.tar.gz bcm5719-llvm-4a7b48d5f42b51fe51d967c15b6eb1880ee865c2.zip | |
Fix the last virtual register enumerations.
llvm-svn: 123102
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 664bfe7a9c0..faae9b2f22a 100644 --- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -172,12 +172,13 @@ void PPCDAGToDAGISel::InsertVRSaveCode(MachineFunction &Fn) { // In this case, there will be virtual registers of vector type created // by the scheduler. Detect them now. bool HasVectorVReg = false; - for (unsigned i = TargetRegisterInfo::FirstVirtualRegister, - e = RegInfo->getLastVirtReg()+1; i != e; ++i) - if (RegInfo->getRegClass(i) == &PPC::VRRCRegClass) { + for (unsigned i = 0, e = RegInfo->getNumVirtRegs(); i != e; ++i) { + unsigned Reg = TargetRegisterInfo::index2VirtReg(i); + if (RegInfo->getRegClass(Reg) == &PPC::VRRCRegClass) { HasVectorVReg = true; break; } + } if (!HasVectorVReg) return; // nothing to do. // If we have a vector register, we want to emit code into the entry and exit |
