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author | Sean Fertile <sfertile@ca.ibm.com> | 2017-01-26 18:59:15 +0000 |
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committer | Sean Fertile <sfertile@ca.ibm.com> | 2017-01-26 18:59:15 +0000 |
commit | 3c8c385a77bbbcadb96cc0f4c65eaded257da6f8 (patch) | |
tree | 345519e6f7ac8b34723a7b3c50902d2511c3da2b /llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | |
parent | c05c42567e0a2b5e5434cf0879f8795e7c1b2adb (diff) | |
download | bcm5719-llvm-3c8c385a77bbbcadb96cc0f4c65eaded257da6f8.tar.gz bcm5719-llvm-3c8c385a77bbbcadb96cc0f4c65eaded257da6f8.zip |
[PPC] cleanup of mayLoad/mayStore flags and memory operands.
1) Explicitly sets mayLoad/mayStore property in the tablegen files on load/store
instructions.
2) Updated the flags on a number of intrinsics indicating that they write
memory.
3) Added SDNPMemOperand flags for some target dependent SDNodes so that they
propagate their memory operand
Review: https://reviews.llvm.org/D28818
llvm-svn: 293200
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 5b540b1ab6f..bef89c7b411 100644 --- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -2964,7 +2964,11 @@ void PPCDAGToDAGISel::Select(SDNode *N) { SelectAddrIdxOnly(LD->getBasePtr(), Base, Offset)) { SDValue Chain = LD->getChain(); SDValue Ops[] = { Base, Offset, Chain }; - CurDAG->SelectNodeTo(N, PPC::LXVDSX, N->getValueType(0), Ops); + SDNode *NewN = CurDAG->SelectNodeTo(N, PPC::LXVDSX, + N->getValueType(0), Ops); + MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); + MemOp[0] = LD->getMemOperand(); + cast<MachineSDNode>(NewN)->setMemRefs(MemOp, MemOp + 1); return; } } |