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author | Nate Begeman <natebegeman@mac.com> | 2006-03-07 08:30:27 +0000 |
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committer | Nate Begeman <natebegeman@mac.com> | 2006-03-07 08:30:27 +0000 |
commit | 3e3219cc0a679d82888b0ad3fd4505818ee36cfe (patch) | |
tree | fc039c97ba3610c47fda5ef4c98e9c49866739c7 /llvm/lib/Target/PowerPC/PPCHazardRecognizers.h | |
parent | 675567f77cfe1694258c8e4d271b6c07836a33b8 (diff) | |
download | bcm5719-llvm-3e3219cc0a679d82888b0ad3fd4505818ee36cfe.tar.gz bcm5719-llvm-3e3219cc0a679d82888b0ad3fd4505818ee36cfe.zip |
This kinda sorta implements "things that have to lead a dispatch group".
llvm-svn: 26591
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCHazardRecognizers.h')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCHazardRecognizers.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h b/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h index f11d3e68292..c13d86d65e1 100644 --- a/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h +++ b/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h @@ -32,6 +32,7 @@ class PPCHazardRecognizer970 : public HazardRecognizer { unsigned NumLSU; // Number of Load/Store instructions unsigned NumFPU; // Number of Floating Point instructions bool HasCR; // True if Condition Register instruction issued + bool HasSPR; // True if Special-Purpose Register instruction used bool HasVALU; // True if Vector Arithmetic instruction issued bool HasVPERM; // True if Vector Permute instruction issued @@ -63,7 +64,7 @@ private: void EndDispatchGroup(); enum PPC970InstrType { - FXU, LSU_LD, LSU_ST, FPU, CR, VALU, VPERM, BR, PseudoInst + FXU, FXU_FIRST, LSU_LD, LSU_ST, FPU, CR, SPR, VALU, VPERM, BR, PseudoInst }; /// GetInstrType - Classify the specified powerpc opcode according to its |