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author | Hal Finkel <hfinkel@anl.gov> | 2013-03-14 19:34:32 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-14 19:34:32 +0000 |
commit | e987a311bacf43634315756e05e9ed42ad33b863 (patch) | |
tree | b8f7de2ece37e817080a667c3f76cd7425c723f6 /llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | |
parent | 8070b382ecf85996ca61aa41e25728038f76daa5 (diff) | |
download | bcm5719-llvm-e987a311bacf43634315756e05e9ed42ad33b863.tar.gz bcm5719-llvm-e987a311bacf43634315756e05e9ed42ad33b863.zip |
Not all PPC functions with a frame pointer need a RS spill slot
We used to add a spill slot for the register scavenger whenever the function
has a frame pointer. This is unnecessarily conservative: We may need the spill
slot for dynamic stack allocations, and functions with dynamic stack
allocations always have a FP, but we might also have a FP for other reasons
(such as the user explicitly disabling frame-pointer elimination), and we don't
necessarily need a spill slot for those functions.
The structsinregs test needed adjustment because it disables FP elimination.
llvm-svn: 177106
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCFrameLowering.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp index 0a396e6693f..a93c9443442 100644 --- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -831,7 +831,7 @@ PPCFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, // r0 for now. if (RegInfo->requiresRegisterScavenging(MF)) - if (needsFP(MF) || spillsCR(MF)) { + if (MFI->hasVarSizedObjects() || spillsCR(MF)) { const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; const TargetRegisterClass *RC = isPPC64 ? G8RC : GPRC; |