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author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2016-02-04 23:14:42 +0000 |
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committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2016-02-04 23:14:42 +0000 |
commit | b6fdce4ca0f35aabab76ed428552a7ee68518863 (patch) | |
tree | 8b92f8880b414716ac1394f600190df61bfdc0fa /llvm/lib/Target/PowerPC/PPCFastISel.cpp | |
parent | 898acf9db8f9db5433ea6e3af58adfdceab38c67 (diff) | |
download | bcm5719-llvm-b6fdce4ca0f35aabab76ed428552a7ee68518863.tar.gz bcm5719-llvm-b6fdce4ca0f35aabab76ed428552a7ee68518863.zip |
Fix for PR 26356
Using the load immediate only when the immediate (whether signed or unsigned)
can fit in a 16-bit signed field. Namely, from -32768 to 32767 for signed and
0 to 65535 for unsigned. This patch also ensures that we sign-extend under the
right conditions.
llvm-svn: 259840
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCFastISel.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCFastISel.cpp | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCFastISel.cpp b/llvm/lib/Target/PowerPC/PPCFastISel.cpp index 795fd6d0b7a..3980ecfac77 100644 --- a/llvm/lib/Target/PowerPC/PPCFastISel.cpp +++ b/llvm/lib/Target/PowerPC/PPCFastISel.cpp @@ -1615,7 +1615,7 @@ bool PPCFastISel::SelectRet(const Instruction *I) { // extension rather than sign extension. Make sure we pass the return // value extension property to integer materialization. unsigned SrcReg = - PPCMaterializeInt(CI, MVT::i64, VA.getLocInfo() == CCValAssign::SExt); + PPCMaterializeInt(CI, MVT::i64, VA.getLocInfo() != CCValAssign::ZExt); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(TargetOpcode::COPY), RetReg).addReg(SrcReg); @@ -2090,22 +2090,21 @@ unsigned PPCFastISel::PPCMaterializeInt(const ConstantInt *CI, MVT VT, const TargetRegisterClass *RC = ((VT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass); + int64_t Imm = UseSExt ? CI->getSExtValue() : CI->getZExtValue(); // If the constant is in range, use a load-immediate. // Since LI will sign extend the constant we need to make sure that for // our zeroext constants that the sign extended constant fits into 16-bits - // a range of 0..0x7fff. - if ((UseSExt && isInt<16>(CI->getSExtValue())) || - (!UseSExt && isUInt<16>(CI->getSExtValue()))) { + if (isInt<16>(Imm)) { unsigned Opc = (VT == MVT::i64) ? PPC::LI8 : PPC::LI; unsigned ImmReg = createResultReg(RC); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ImmReg) - .addImm(CI->getSExtValue()); + .addImm(Imm); return ImmReg; } // Construct the constant piecewise. - int64_t Imm = UseSExt ? CI->getSExtValue() : CI->getZExtValue(); if (VT == MVT::i64) return PPCMaterialize64BitInt(Imm, RC); else if (VT == MVT::i32) |