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author | Hal Finkel <hfinkel@anl.gov> | 2015-01-08 22:11:49 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2015-01-08 22:11:49 +0000 |
commit | 3c0952b0723e1225270dd6229f3361bdf556cf9d (patch) | |
tree | 950d5e30c6555492bb7bc9cef123cdf7da2177a2 /llvm/lib/Target/PowerPC/PPCFastISel.cpp | |
parent | 0709f5160f8b2bf0ab03ad8844ac1a9278b70312 (diff) | |
download | bcm5719-llvm-3c0952b0723e1225270dd6229f3361bdf556cf9d.tar.gz bcm5719-llvm-3c0952b0723e1225270dd6229f3361bdf556cf9d.zip |
[PowerPC] Mark all instructions as non-cheap for MachineLICM
MachineLICM uses a callback named hasLowDefLatency to determine if an
instruction def operand has a 'low' latency. If all relevant operands have a
'low' latency, the instruction is considered too cheap to hoist out of loops
even in low-register-pressure situations. On PowerPC cores, both the embedded
cores and the others, there is no reason to believe that this is a good choice:
all instructions have a cost inside a loop, and hoisting them when not limited
by register pressure is a reasonable default.
llvm-svn: 225471
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCFastISel.cpp')
0 files changed, 0 insertions, 0 deletions