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author | Hiroshi Inoue <inouehrs@jp.ibm.com> | 2018-04-06 05:41:16 +0000 |
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committer | Hiroshi Inoue <inouehrs@jp.ibm.com> | 2018-04-06 05:41:16 +0000 |
commit | a2eefb6d9a76e456552fd96fad3dae6c0266cbed (patch) | |
tree | 2041568918741a73177ed63defeceb4a464423c6 /llvm/lib/Target/PowerPC/PPCCallingConv.h | |
parent | 248148db0032b2f9061449b3dac0a5436ca16a3e (diff) | |
download | bcm5719-llvm-a2eefb6d9a76e456552fd96fad3dae6c0266cbed.tar.gz bcm5719-llvm-a2eefb6d9a76e456552fd96fad3dae6c0266cbed.zip |
[PowerPC] allow D-form VSX load/store when accessing FrameIndex without offset
VSX D-form load/store instructions of POWER9 require the offset be a multiple of 16 and a helper`isOffsetMultipleOf` is used to check this.
So far, the helper handles FrameIndex + offset case, but not handling FrameIndex without offset case. Due to this, we are missing opportunities to exploit D-form instructions when accessing an object or array allocated on stack.
For example, x-form store (stxvx) is used for int a[4] = {0}; instead of d-form store (stxv). For larger arrays, D-form instruction is not used when accessing the first 16-byte. Using D-form instructions reduces register pressure as well as instructions.
Differential Revision: https://reviews.llvm.org/D45079
llvm-svn: 329377
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCCallingConv.h')
0 files changed, 0 insertions, 0 deletions