Encode pc-relative conditional branch offset as pc+(num of bytes / 4). The

asm printer will print it as offset*4. e.g. bne cr0, $+8.

The PPC code emitter was expecting the offset to be number of instructions, not
number of bytes. This fixes a whole bunch of JIT failures.

llvm-svn: 29885

1 files changed, 1 insertions, 1 deletions

diff --git a/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp b/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
index b3d100cf5e5..78932a9a766 100644
--- a/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -133,7 +133,7 @@ bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) {
         if (Displacement >= -32768 && Displacement <= 32767) {
           BuildMI(*MBB, MBBJ, Opcode, 2).addReg(CRReg).addMBB(trueMBB);
         } else {
-          BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(8);
+          BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(2);
           BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(trueMBB);
         }