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| author | Nate Begeman <natebegeman@mac.com> | 2004-09-29 02:35:05 +0000 | 
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2004-09-29 02:35:05 +0000 | 
| commit | 26566f0b686246beb7fb1729bf4eb818f246bbf2 (patch) | |
| tree | 9583a17fa0405e6e035f1ff83ce044b1da6c6fa9 /llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp | |
| parent | 7aed44892cecbe7f126c8041aa70b21f545769f8 (diff) | |
| download | bcm5719-llvm-26566f0b686246beb7fb1729bf4eb818f246bbf2.tar.gz bcm5719-llvm-26566f0b686246beb7fb1729bf4eb818f246bbf2.zip | |
To go along with sabre's improved InstCombining, improve recognition of
integers that we can use as immediate values in instructions.
Example from yacr2:
-       lis r10, -1
-       ori r10, r10, 65535
-       add r28, r28, r10
+       addi r28, r28, -1
        addi r7, r7, 1
        addi r9, r9, 1
        b .LBB_main_9   ; loopentry.1.i214
llvm-svn: 16566
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp | 30 | 
1 files changed, 9 insertions, 21 deletions
| diff --git a/llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp b/llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp index c8fde63e931..afb96f732d3 100644 --- a/llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp +++ b/llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp @@ -32,9 +32,6 @@  using namespace llvm;  namespace { -  Statistic<> -  MultiUseGEP("ppc-codegen", "Number of GEPs folded with more than one use"); -      /// TypeClass - Used by the PowerPC backend to group LLVM types by their basic    /// PPC Representation.    /// @@ -491,34 +488,27 @@ bool PPC32ISel::canUseAsImmediateForOpcode(ConstantInt *CI, unsigned Operator) {    ConstantUInt *Op1Cu;    // ADDI, Compare, and non-indexed Load take SIMM -  bool cond1 = (Operator == 0)  -    && (Op1Cs = dyn_cast<ConstantSInt>(CI)) -    && (Op1Cs->getValue() <= 32767) -    && (Op1Cs->getValue() >= -32768); +  bool cond1 = (Operator == 0) +    && ((int32_t)CI->getRawValue() <= 32767) +    && ((int32_t)CI->getRawValue() >= -32768);    // SUBI takes -SIMM since it is a mnemonic for ADDI    bool cond2 = (Operator == 1) -    && (Op1Cs = dyn_cast<ConstantSInt>(CI))  -    && (Op1Cs->getValue() <= 32768) -    && (Op1Cs->getValue() >= -32767); +    && ((int32_t)CI->getRawValue() <= 32768) +    && ((int32_t)CI->getRawValue() >= -32767);    // ANDIo, ORI, and XORI take unsigned values    bool cond3 = (Operator >= 2)      && (Op1Cs = dyn_cast<ConstantSInt>(CI))      && (Op1Cs->getValue() >= 0) -    && (Op1Cs->getValue() <= 32767); - -  // ADDI and SUBI take SIMMs, so we have to make sure the UInt would fit -  bool cond4 = (Operator < 2) -    && (Op1Cu = dyn_cast<ConstantUInt>(CI))  -    && (Op1Cu->getValue() <= 32767); +    && (Op1Cs->getValue() <= 65535);    // ANDIo, ORI, and XORI take UIMMs, so they can be larger -  bool cond5 = (Operator >= 2) +  bool cond4 = (Operator >= 2)      && (Op1Cu = dyn_cast<ConstantUInt>(CI))      && (Op1Cu->getValue() <= 65535); -  if (cond1 || cond2 || cond3 || cond4 || cond5) +  if (cond1 || cond2 || cond3 || cond4)      return true;    return false; @@ -3321,10 +3311,8 @@ void PPC32ISel::emitGEPOperation(MachineBasicBlock *MBB,                                   GetElementPtrInst *GEPI, bool GEPIsFolded) {    // If we've already emitted this particular GEP, just return to avoid    // multiple definitions of the base register. -  if (GEPIsFolded && (GEPMap[GEPI].base != 0)) { -    MultiUseGEP++; +  if (GEPIsFolded && (GEPMap[GEPI].base != 0))      return; -  }    Value *Src = GEPI->getOperand(0);    User::op_iterator IdxBegin = GEPI->op_begin()+1; | 

