diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-08-25 22:03:50 +0000 | 
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-08-25 22:03:50 +0000 | 
| commit | 717f97a5c8c7fd7846e0cb4ac77913ec87a8a695 (patch) | |
| tree | 58d740c9277828dd52c77accd3c458728100a3a2 /llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp | |
| parent | b746dd1cf6520030e097ab4af88413c3c346e088 (diff) | |
| download | bcm5719-llvm-717f97a5c8c7fd7846e0cb4ac77913ec87a8a695.tar.gz bcm5719-llvm-717f97a5c8c7fd7846e0cb4ac77913ec87a8a695.zip | |
Simplify some code.  It's not clear why the UDIV expanded sequence
doesn't work for large uint constants, but we'll keep the current behavior
llvm-svn: 23061
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp | 20 | 
1 files changed, 7 insertions, 13 deletions
| diff --git a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp index da07b3040de..4d92e8aed59 100644 --- a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp +++ b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp @@ -1375,29 +1375,23 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {          BuildMI(BB, PPC::ADDZE, 1, Tmp4).addReg(Tmp1);          BuildMI(BB, PPC::NEG, 1, Result).addReg(Tmp4);          return Result; +      } else if (Tmp3) { +        ExprMap.erase(N); +        return SelectExpr(BuildSDIVSequence(N));        }      }      // fall thru    case ISD::UDIV:      // If this is a divide by constant, we can emit code using some magic      // constants to implement it as a multiply instead. -    if (isIntImmediate(N.getOperand(1), Tmp3)) { -      if (opcode == ISD::SDIV) { -        if ((signed)Tmp3 < -1 || (signed)Tmp3 > 1) { -          ExprMap.erase(N); -          return SelectExpr(BuildSDIVSequence(N)); -        } -      } else { -        if ((signed)Tmp3 > 1) { -          ExprMap.erase(N); -          return SelectExpr(BuildUDIVSequence(N)); -        } -      } +    if (isIntImmediate(N.getOperand(1), Tmp3) && (signed)Tmp3 > 1) { +      ExprMap.erase(N); +      return SelectExpr(BuildUDIVSequence(N));      }      Tmp1 = SelectExpr(N.getOperand(0));      Tmp2 = SelectExpr(N.getOperand(1));      switch (DestType) { -    default: assert(0 && "Unknown type to ISD::SDIV"); break; +    default: assert(0 && "Unknown type to ISD::DIV"); break;      case MVT::i32: Opc = (ISD::UDIV == opcode) ? PPC::DIVWU : PPC::DIVW; break;      case MVT::f32: Opc = PPC::FDIVS; break;      case MVT::f64: Opc = PPC::FDIV; break; | 

