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authorBill Wendling <isanbard@gmail.com>2013-06-18 07:20:20 +0000
committerBill Wendling <isanbard@gmail.com>2013-06-18 07:20:20 +0000
commitbc07a8900c2277f2a00776035359d5453d364757 (patch)
treeb0aaf192747681bb8fabebceb611b9c464d4355e /llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
parent0fdd01965e435fac15e018ef939681d45b552809 (diff)
downloadbcm5719-llvm-bc07a8900c2277f2a00776035359d5453d364757.tar.gz
bcm5719-llvm-bc07a8900c2277f2a00776035359d5453d364757.zip
Use pointers to the MCAsmInfo and MCRegInfo.
Someone may want to do something crazy, like replace these objects if they change or something. No functionality change intended. llvm-svn: 184175
Diffstat (limited to 'llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
index 31c73aeff56..420c01ba9e7 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
@@ -191,7 +191,7 @@ unsigned PPCMCCodeEmitter::getTLSRegEncoding(const MCInst &MI, unsigned OpNo,
// Return the thread-pointer register's encoding.
Fixups.push_back(MCFixup::Create(0, MO.getExpr(),
(MCFixupKind)PPC::fixup_ppc_tlsreg));
- return CTX.getRegisterInfo().getEncodingValue(PPC::X13);
+ return CTX.getRegisterInfo()->getEncodingValue(PPC::X13);
}
unsigned PPCMCCodeEmitter::
@@ -202,7 +202,7 @@ get_crbitm_encoding(const MCInst &MI, unsigned OpNo,
MI.getOpcode() == PPC::MFOCRF ||
MI.getOpcode() == PPC::MTCRF8) &&
(MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7));
- return 0x80 >> CTX.getRegisterInfo().getEncodingValue(MO.getReg());
+ return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
}
@@ -214,7 +214,7 @@ getMachineOpValue(const MCInst &MI, const MCOperand &MO,
// The GPR operand should come through here though.
assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) ||
MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7);
- return CTX.getRegisterInfo().getEncodingValue(MO.getReg());
+ return CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
}
assert(MO.isImm() &&
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