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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2013-05-17 12:37:21 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2013-05-17 12:37:21 +0000
commit6e23ac606e4fefc69f8df54036614e8bf973e489 (patch)
treeb59039e3117138fb91253fac6bb059e31ffbbe7a /llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
parent994f49ed79547bfbc0c2ed9cf1b39ab35a2cce44 (diff)
downloadbcm5719-llvm-6e23ac606e4fefc69f8df54036614e8bf973e489.tar.gz
bcm5719-llvm-6e23ac606e4fefc69f8df54036614e8bf973e489.zip
[PowerPC] Merge/rename PPC fixup types
Now that fixup_ppc_ha16 and fixup_ppc_lo16 are being treated exactly the same everywhere, it no longer makes sense to have two fixup types. This patch merges them both into a single type fixup_ppc_half16, and renames fixup_ppc_lo16_ds to fixup_ppc_half16ds for consistency. (The half16 and half16ds names are taken from the description of relocation types in the PowerPC ABI.) No change in code generation expected. llvm-svn: 182092
Diffstat (limited to 'llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp18
1 files changed, 6 insertions, 12 deletions
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
index 9ec5f0e0b54..3fa2e0933cf 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
@@ -37,13 +37,9 @@ static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
return Value & 0xfffc;
case PPC::fixup_ppc_br24:
return Value & 0x3fffffc;
-#if 0
- case PPC::fixup_ppc_hi16:
-#endif
- case PPC::fixup_ppc_ha16:
- case PPC::fixup_ppc_lo16:
+ case PPC::fixup_ppc_half16:
return Value & 0xffff;
- case PPC::fixup_ppc_lo16_ds:
+ case PPC::fixup_ppc_half16ds:
return Value & 0xfffc;
}
}
@@ -55,9 +51,8 @@ static unsigned getFixupKindNumBytes(unsigned Kind) {
case FK_Data_1:
return 1;
case FK_Data_2:
- case PPC::fixup_ppc_ha16:
- case PPC::fixup_ppc_lo16:
- case PPC::fixup_ppc_lo16_ds:
+ case PPC::fixup_ppc_half16:
+ case PPC::fixup_ppc_half16ds:
return 2;
case FK_Data_4:
case PPC::fixup_ppc_brcond14:
@@ -98,9 +93,8 @@ public:
// name offset bits flags
{ "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel },
- { "fixup_ppc_lo16", 0, 16, 0 },
- { "fixup_ppc_ha16", 0, 16, 0 },
- { "fixup_ppc_lo16_ds", 0, 14, 0 },
+ { "fixup_ppc_half16", 0, 16, 0 },
+ { "fixup_ppc_half16ds", 0, 14, 0 },
{ "fixup_ppc_tlsreg", 0, 0, 0 },
{ "fixup_ppc_nofixup", 0, 0, 0 }
};
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