[PowerPC] Pretty-print CR bits the way the binutils disassembler does

This patch just adds printing of CR bit registers in a more human-readable
form akin to that used by the GNU binutils.

Differential Revision: https://reviews.llvm.org/D31494

llvm-svn: 309001

1 files changed, 26 insertions, 11 deletions

diff --git a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
index baf5902ddf5..c6ed4896729 100644
--- a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
@@ -84,7 +84,7 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
       return;
     }
   }
-  
+
   if ((MI->getOpcode() == PPC::OR || MI->getOpcode() == PPC::OR8) &&
       MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
     O << "\tmr ";
@@ -94,7 +94,7 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
     printAnnotation(O, Annot);
     return;
   }
-  
+
   if (MI->getOpcode() == PPC::RLDICR ||
       MI->getOpcode() == PPC::RLDICR_32) {
     unsigned char SH = MI->getOperand(2).getImm();
@@ -161,7 +161,7 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
       return;
     }
   }
-  
+
   if (!printAliasInstr(MI, O))
     printInstruction(MI, O);
   printAnnotation(O, Annot);
@@ -259,7 +259,7 @@ void PPCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNo,
     }
     llvm_unreachable("Invalid predicate code");
   }
-  
+
   assert(StringRef(Modifier) == "reg" &&
          "Need to specify 'cc', 'pm' or 'reg' as predicate op modifier!");
   printOperand(MI, OpNo+1, O);
@@ -448,9 +448,24 @@ void PPCInstPrinter::printTLSCall(const MCInst *MI, unsigned OpNo,
 
 /// stripRegisterPrefix - This method strips the character prefix from a
 /// register name so that only the number is left.  Used by for linux asm.
-static const char *stripRegisterPrefix(const char *RegName) {
-  if (FullRegNames || ShowVSRNumsAsVR)
+static const char *stripRegisterPrefix(const char *RegName, unsigned RegNum,
+                                       unsigned RegEncoding) {
+  if (FullRegNames) {
+    if (RegNum >= PPC::CR0EQ && RegNum <= PPC::CR7UN) {
+      const char *CRBits[] =
+      { "lt", "gt", "eq", "un",
+        "4*cr1+lt", "4*cr1+gt", "4*cr1+eq", "4*cr1+un",
+        "4*cr2+lt", "4*cr2+gt", "4*cr2+eq", "4*cr2+un",
+        "4*cr3+lt", "4*cr3+gt", "4*cr3+eq", "4*cr3+un",
+        "4*cr4+lt", "4*cr4+gt", "4*cr4+eq", "4*cr4+un",
+        "4*cr5+lt", "4*cr5+gt", "4*cr5+eq", "4*cr5+un",
+        "4*cr6+lt", "4*cr6+gt", "4*cr6+eq", "4*cr6+un",
+        "4*cr7+lt", "4*cr7+gt", "4*cr7+eq", "4*cr7+un"
+      };
+      return CRBits[RegEncoding];
+    }
     return RegName;
+  }
 
   switch (RegName[0]) {
   case 'r':
@@ -462,7 +477,7 @@ static const char *stripRegisterPrefix(const char *RegName) {
     return RegName + 1;
   case 'c': if (RegName[1] == 'r') return RegName + 2;
   }
-  
+
   return RegName;
 }
 
@@ -490,17 +505,17 @@ void PPCInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
     const char *RegName = getRegisterName(Reg);
     // The linux and AIX assembler does not take register prefixes.
     if (!isDarwinSyntax())
-      RegName = stripRegisterPrefix(RegName);
-    
+      RegName = stripRegisterPrefix(RegName, Reg, MRI.getEncodingValue(Reg));
+
     O << RegName;
     return;
   }
-  
+
   if (Op.isImm()) {
     O << Op.getImm();
     return;
   }
-  
+
   assert(Op.isExpr() && "unknown operand kind in printOperand");
   Op.getExpr()->print(O, &MAI);
 }