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author | Hal Finkel <hfinkel@anl.gov> | 2015-04-23 22:47:57 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2015-04-23 22:47:57 +0000 |
commit | fefcfffe68ac76b5c425b640a59ae0f4e24b5a20 (patch) | |
tree | e214b7012b89ad76fd131fbcb37aea03155110e6 /llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp | |
parent | 20ae2a311f5fd71924ff286a0dae754fae4b0fcd (diff) | |
download | bcm5719-llvm-fefcfffe68ac76b5c425b640a59ae0f4e24b5a20.tar.gz bcm5719-llvm-fefcfffe68ac76b5c425b640a59ae0f4e24b5a20.zip |
[PowerPC] Add asm/disasm support for dcbt with hint
Add assembler/disassembler support for dcbt/dcbtst (and aliases) with the hint
field specified (non-zero). Unforunately, the syntax for this instruction is
special in that it differs for server vs. embedded cores:
dcbt ra, rb, th [server]
dcbt th, ra, rb [embedded]
where th can be omitted when it is 0. dcbtst is the same. Thus we need to play
games in the parser and the printer to flip the operands around on the embedded
cores. We'll use the server syntax as the default (binutils currently uses the
embedded form by default, but IBM is changing that).
We also stop marking dcbtst as having unmodeled side effects (this is not
necessary, it is just a hint like dcbt -- noticed by inspection, so no separate
test case).
llvm-svn: 235657
Diffstat (limited to 'llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp index 046682ddfc3..c87499ffeae 100644 --- a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp +++ b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp @@ -101,6 +101,38 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O, return; } } + + // dcbt[st] is printed manually here because: + // 1. The assembly syntax is different between embedded and server targets + // 2. We must print the short mnemonics for TH == 0 because the + // embedded/server syntax default will not be stable across assemblers + // The syntax for dcbt is: + // dcbt ra, rb, th [server] + // dcbt th, ra, rb [embedded] + // where th can be omitted when it is 0. dcbtst is the same. + if (MI->getOpcode() == PPC::DCBT || MI->getOpcode() == PPC::DCBTST) { + unsigned char TH = MI->getOperand(0).getImm(); + O << "\tdcbt"; + if (MI->getOpcode() == PPC::DCBTST) + O << "st"; + if (TH == 16) + O << "t"; + O << " "; + + bool IsBookE = (STI.getFeatureBits() & PPC::FeatureBookE) != 0; + if (IsBookE && TH != 0 && TH != 16) + O << (unsigned int) TH << ", "; + + printOperand(MI, 1, O); + O << ", "; + printOperand(MI, 2, O); + + if (!IsBookE && TH != 0 && TH != 16) + O << ", " << (unsigned int) TH; + + printAnnotation(O, Annot); + return; + } // For fast-isel, a COPY_TO_REGCLASS may survive this long. This is // used when converting a 32-bit float to a 64-bit float as part of |